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iter boehm-retirement.1 (DONE 10/10): retire the transitional Boehm GC backend

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Closes Gitea #4. Removes the Boehm-Demers-Weiser conservative GC
backend wholesale across six layers in one atomic iteration. After
this iter, `AllocStrategy` has two variants (`Rc`, `Bump`),
`--alloc=gc` is rejected at CLI parse with `unknown --alloc value`,
the libgc link arm is gone, and the design ledger describes RC
(canonical) + bump (raw-alloc bench-floor) as the only allocators.

Layer-by-layer summary:

  CLI surface — `crates/ail/src/main.rs`:
    `parse_alloc_strategy` arm `"gc" => Ok(AllocStrategy::Gc)`
    removed; error wording updated to `(expected `rc` or `bump`)`;
    clap-derive `value_parser = ["gc","bump","rc"]` allowlist on
    BOTH `Build` and `Run` subcommands DROPPED so that
    `parse_alloc_strategy` remains the sole gatekeeper for the
    unknown-value diagnostic (otherwise clap shadows the runtime
    diagnostic with `invalid value 'gc' for '--alloc'`, which would
    miss the milestone-pin's stderr substring check). The
    `default_value = "rc"` stays.

  Codegen — `crates/ailang-codegen/src/lib.rs`:
    `AllocStrategy::Gc` variant + `Default` derive removed (no
    caller of `AllocStrategy::default()` existed in the workspace,
    so the trait derivation was dead). `fn_name` (spec called it
    `runtime_alloc_fn` loosely; actual identifier is `fn_name`)
    drops the `Gc => "GC_malloc"` arm. `lower_workspace` and
    `lower_workspace_staticlib` defaults flip from `Gc` to `Rc`.
    In-source negative-complement codegen test (mod tests, lib.rs:3571ff)
    retargets from `AllocStrategy::Gc` to `AllocStrategy::Bump`
    (bump also doesn't emit per-type drop fns; the test's semantic
    "no drop fns under non-RC" is preserved).

  Link branch — `crates/ail/src/main.rs:2389ff`:
    The `match strategy { AllocStrategy::Gc => { ... cmd.arg("-lgc"); ... } }`
    arm and its libgc-link block are entirely gone. The surviving
    match exhausts on `Bump` and `Rc` (Rust's exhaustiveness check
    confirms; no `error[E0004]`). Staticlib-guard diagnostic
    rewritten to drop the "shared Boehm collector" phrasing while
    preserving the prefix `staticlib (swarm) artefact is RC-only`
    verbatim (the surviving `staticlib_bump_is_rejected` test
    depends on that substring).

  Test suite — 3 pure-differential e2e tests deleted
    (`gc_handles_recursive_list_construction`,
    `alloc_rc_produces_same_stdout_as_gc`,
    `alloc_rc_matches_gc_on_std_list_demo`); 9 RC-feature tests
    stripped of their `stdout_gc` build call and differential
    `assert_eq!(stdout_gc, stdout_rc, ...)` (absolute
    `assert_eq!(stdout_rc.trim(), "<n>")` pin retained as
    correctness oracle); `staticlib_gc_is_rejected` deleted; new
    milestone-pin `crates/ail/tests/boehm_retirement_pin.rs`
    asserts `ail build --alloc=gc` exits ≠ 0 with stderr containing
    `unknown --alloc value` and `\`gc\``; `examples/gc_stress.ail`
    fixture deleted (no remaining references).

    Implementer expansion (not in plan): `iter17a_local_box_alloca`
    (in `e2e.rs`) carried an IR-shape assertion against
    `@GC_malloc`-absence as the witness for non-escaping
    allocation. After the Task-2 codegen default flip, the witness
    shifts to `@ailang_rc_alloc`-absence in escape-targeted
    positions; assertion + doc-comment updated. Property
    protected ("no heap allocation in non-escaping contexts") is
    unchanged; only the named allocator shifts.

  Bench harness — `bench/run.sh` 9→6 column compaction
    (workload + bump(s) + rc(s) + rc/bump + bump RSS + rc RSS);
    gc-arm `bench_latency_implicit_gc` build call + harness
    invocation dropped from latency block; header comment reframed
    from "GC-overhead bench harness" to "RC-overhead bench
    harness"; "Decision 10's Boehm-retirement target (1.3x)"
    rewording to "RC-overhead-vs-bump bench-health regression gate".

    `bench/check.py:62` header-sentinel changes from
    `"gc(s)" in line` to `"bump(s)" in line`; column-count check
    at `:72` flips from `!= 9` to `!= 6`; per-workload field set
    drops `gc_s`/`gc_over_bump`/`gc_rss_kb`; `ARM_LABEL_TO_KEY`
    drops the `"implicit @ gc": "implicit_at_gc"` entry.
    `bench/baseline.json` regenerated via `--update-baseline`.

    Implementer note (planner-defect): `write_new_baseline`
    iterated over the *existing* baseline's metric list when
    emitting the regenerated file, so even after parser-level
    `gc_*` removal, the fallback emitted them back into the JSON.
    Scrubbed post-update; the cleaner fix (have
    `write_new_baseline` emit only keys present in
    `parsed_throughput[workload]`) is a follow-up if the script
    becomes load-bearing for further allocator changes.

  Design ledger — `design/models/rc-uniqueness.md` excises the
    `## Dual allocator — RC canonical, Boehm parity oracle`
    section and the `Boehm-Demers-Weiser conservative GC` choice
    block + rationale + trade-offs; the per-fn-alloca section
    generalises Boehm-specific language to allocator-agnostic;
    the memory-model section's `## Choice.` paragraph reframes the
    1.3× target from "Boehm-retirement gate" to "bench-health
    regression gate".

    `design/models/pipeline.md` drops the `--alloc=gc → links libgc`
    arm of the pipeline diagram and replaces it with
    `--alloc=bump → links bump-floor`; the accompanying prose
    rewrites accordingly.

    `design/contracts/scope-boundaries.md` rewrites the
    "Memory management via Boehm conservative GC" bullet to
    describe RC + per-fn-arena present-tense; the dead reference
    to `examples/gc_stress.ail.json` (file never existed; the
    fixture only ever had a `.ail` form, deleted by this iter) is
    dropped along with the `examples/std_list_stress.ail.json`
    reference whose purpose was Boehm-only soak testing.
    `:67`'s `@printf` / `@GC_malloc` parenthetical updated.

    `design/contracts/memory-model.md:232` drops the
    "leaks like the pre-Boehm era" phrase; the RC inc/dec
    instrumentation is wired up, so the "until then" conditional
    that referenced pre-Boehm is closed.

    `design/contracts/embedding-abi.md:42-44` rewrites the
    staticlib-guard prose to drop the `--alloc=gc` clause (gc is
    now a CLI-parser-level unknown-value, not a staticlib-guard
    rejection) and reframe the swarm-safety justification around
    `--alloc=bump` (leak-only bench instrument) rather than the
    historical Boehm collector.

  Honesty pin — `crates/ailang-core/tests/docs_honesty_pin.rs`
    inverts the polarity: the present-tense Boehm-anchor assertion
    on `pipeline.md` (`:116-117`) is deleted, and four
    absence-pins are added to `design_md_has_no_wunschdenken`
    against the Boehm-zombie strings `transitional Boehm`,
    `parity oracle`, `GC_malloc`, `libgc`. The
    `design_corpus()` already includes `rc-uniqueness.md` so no
    path-list change was needed for the new pins to scan.

    `crates/ailang-core/tests/design_index_pin.rs:166` drops the
    `"pre-Boehm"` token from the protected-exception comment list
    (the phrase no longer appears in `memory-model.md` after this
    iter, so the exception is dead).

  Runtime docs — `runtime/bump.c`, `runtime/rc.c`, `runtime/str.c`
    header comments scrubbed of Boehm/`GC_malloc`/`libgc`
    references. `bump.c`'s function signature description still
    documents `void *bump_malloc(size_t)` as the bench-floor
    allocator interface, but no longer cross-references libgc.

  Example fixtures — `examples/bench_latency_implicit.ail`,
    `bench_latency_explicit.ail`, `escape_local_demo.ail`,
    `reuse_as_demo.ail`, `rc_pin_recurse_implicit.ail` doc-comment
    headers scrubbed of `--alloc=gc` / Boehm references. The
    `.ail` surface (AST) is untouched in every case; round-trip
    invariant holds (`cargo test -p ailang-surface --test round_trip`
    green).

  Skill / agent prompts — `skills/audit/agents/ailang-bencher.md`
    rewritten to use an RC-vs-bump worked example pattern for the
    hypothesis-driven bench tutorial, replacing the recurring
    "RC vs Boehm under heap pressure" example.
    `skills/implement/agents/ailang-implementer.md` Decision-10 /
    Boehm references replaced with present-tense RC-commitment
    framing.

  IR snapshots — the 5 checked-in snapshots
    (`crates/ail/tests/snapshots/{hello,list,max3,sum,ws_main}.ll`)
    regenerated via `UPDATE_SNAPSHOTS=1 cargo test -p ail --test
    ir_snapshot`. Each previously contained
    `declare ptr @GC_malloc(i64)` and (for `list.ll`) a `call ptr
    @GC_malloc(...)` invocation; post-flip the snapshots contain
    `declare ptr @ailang_rc_alloc(i64)` plus the rc inc/dec runtime
    declarations.

Spec-vs-acceptance addendum (caught at orchestrator end-report,
absorbed here rather than in a follow-up spec edit): spec §6
acceptance criteria said "Boehm-grep returns matches ONLY in
docs_honesty_pin.rs". The plan itself prescribed historical Boehm
references in 3 additional files: (a) the new milestone-pin
`boehm_retirement_pin.rs` (must literally invoke `--alloc=gc` to
assert its rejection), (b) `embed_staticlib_alloc_guard.rs` file
doc-comment historical note ("`--alloc=gc` no longer exists as a
CLI value"), (c) `embedding-abi.md:44-45` contract historical
clause ("see the Boehm-retirement iter"). All three are
prescribed; the spec's grep wording was too narrow. The four
absence-pins in `docs_honesty_pin.rs` catch the actual zombies
(Boehm-narrative re-emerging in the design ledger), which is the
substantive intent the spec was aiming at — the four extra
documented-by-design exceptions are the cost of having an
explicit milestone-pin and contract-level historical anchors.

Net delta:
  - 32 files modified, 2 new (boehm_retirement_pin.rs + stats),
    1 deleted (gc_stress.ail);
  - workspace tests: every binary `0 failed`. Pass-count delta:
    -3 net (4 e2e tests deleted, 1 new milestone-pin test added);
  - boehm-grep state: hits only in the four by-design exceptions
    documented above;
  - `bench/check.py` exit 0 against regenerated baseline;
  - CLI must-fail fixture: `ail build --alloc=gc examples/hello.ail`
    exits non-zero with stderr containing `unknown --alloc value`
    and `\`gc\``;
  - design ledger present-tense honest (Boehm-narrative gone from
    `rc-uniqueness.md` + `pipeline.md`; the few historical
    references in `embedding-abi.md` / `boehm_retirement_pin.rs` /
    `embed_staticlib_alloc_guard.rs` are explicit milestone-pins
    or contract anchors, not silent ledger residue).

Bench measurement variance noted: closure-chain and hof-pipeline
are ±1-5% jittery between runs; one regeneration flagged 2
metrics as `regressed` before a second run returned 0. The
captured baseline is within self-comparison range. Existing
per-metric tolerances absorb the jitter.

Stats file:
`bench/orchestrator-stats/2026-05-20-iter-boehm-retirement.1.json`.

closes #4
This commit is contained in:
Brummel
2026-05-20 20:51:53 +02:00
parent ad0a8d8786
commit 14a91f0ae5
34 changed files with 778 additions and 697 deletions
Download Patch File Download Diff File Expand all files Collapse all files
bench/baseline.json
+33 -119
View File
@@ -2,103 +2,67 @@
"version": 1,
"captured": "2026-05-20",
"captured_via": "bench/run.sh -n 5",
"note": "Baseline for bench/check.py regression detection. The language-invariant thresholds (rc/bump <= 1.3x throughput, p99/median <= 5x latency) are NOT the regression-check tolerances; the per-metric tolerances below are tuned to absorb run-to-run noise on a quiet developer machine. To update after an intentional change, re-run bench/run.sh and replace the values, recording the reason in the commit body that ships the baseline bump. The latency arms gate only on median / p99 / p99_over_median — max_us and p99_9_us were removed on the 2026-05-20 recapture (Gitea #15 / #16) because tail-of-distribution latency metrics are dominated by OS-level jitter (THP defrag, scheduler preemption, IRQ load), not allocator behaviour, and produced 3+ consecutive false-positive REGRESSION rows on byte-identical no-op milestones. See docs/specs/2026-05-20-bench-harness-recalibration.md.",
"note": "Baseline for bench/check.py regression detection. The language-invariant thresholds (rc/bump <= 1.3x throughput, p99/median <= 5x latency) are NOT the regression-check tolerances; the per-metric tolerances below are tuned to absorb run-to-run noise on a quiet developer machine. To update after an intentional change, re-run bench/run.sh and replace the values, recording the reason in the commit body that ships the baseline bump. The latency arms gate only on median / p99 / p99_over_median \u2014 max_us and p99_9_us were removed on the 2026-05-20 recapture (Gitea #15 / #16) because tail-of-distribution latency metrics are dominated by OS-level jitter (THP defrag, scheduler preemption, IRQ load), not allocator behaviour, and produced 3+ consecutive false-positive REGRESSION rows on byte-identical no-op milestones. See docs/specs/2026-05-20-bench-harness-recalibration.md.",
"throughput": {
"bench_list_sum": {
"gc_s": {
"baseline": 0.150576,
"tolerance_pct": 10
},
"bump_s": {
"baseline": 0.052977,
"baseline": 0.053075,
"tolerance_pct": 10
},
"rc_s": {
"baseline": 0.143404,
"baseline": 0.144645,
"tolerance_pct": 10
},
"gc_over_bump": {
"baseline": 2.84,
"tolerance_pct": 8
},
"rc_over_bump": {
"baseline": 2.71,
"baseline": 2.73,
"tolerance_pct": 8
},
"gc_rss_kb": {
"baseline": 137636.0,
"tolerance_pct": 5
},
"bump_rss_kb": {
"baseline": 97436.0,
"baseline": 97884.0,
"tolerance_pct": 5
},
"rc_rss_kb": {
"baseline": 193628.0,
"baseline": 193820.0,
"tolerance_pct": 5
}
},
"bench_tree_walk": {
"gc_s": {
"baseline": 0.101088,
"tolerance_pct": 10
},
"bump_s": {
"baseline": 0.038371,
"baseline": 0.039941,
"tolerance_pct": 10
},
"rc_s": {
"baseline": 0.098525,
"baseline": 0.099691,
"tolerance_pct": 10
},
"gc_over_bump": {
"baseline": 2.63,
"tolerance_pct": 8
},
"rc_over_bump": {
"baseline": 2.57,
"baseline": 2.5,
"tolerance_pct": 8
},
"gc_rss_kb": {
"baseline": 73316.0,
"tolerance_pct": 5
},
"bump_rss_kb": {
"baseline": 55196.0,
"tolerance_pct": 5
},
"rc_rss_kb": {
"baseline": 108764.0,
"baseline": 108956.0,
"tolerance_pct": 5
}
},
"bench_closure_chain": {
"gc_s": {
"baseline": 0.012135,
"tolerance_pct": 25
},
"bump_s": {
"baseline": 0.007945,
"baseline": 0.008045,
"tolerance_pct": 25
},
"rc_s": {
"baseline": 0.031716,
"baseline": 0.032188,
"tolerance_pct": 20
},
"gc_over_bump": {
"baseline": 1.53,
"tolerance_pct": 15
},
"rc_over_bump": {
"baseline": 3.99,
"tolerance_pct": 15
},
"gc_rss_kb": {
"baseline": 13684.0,
"baseline": 4.0,
"tolerance_pct": 15
},
"bump_rss_kb": {
"baseline": 15836.0,
"baseline": 16024.0,
"tolerance_pct": 15
},
"rc_rss_kb": {
@@ -107,148 +71,98 @@
}
},
"bench_hof_pipeline": {
"gc_s": {
"baseline": 0.149062,
"tolerance_pct": 10
},
"bump_s": {
"baseline": 0.051993,
"baseline": 0.051527,
"tolerance_pct": 10
},
"rc_s": {
"baseline": 0.143367,
"baseline": 0.143245,
"tolerance_pct": 10
},
"gc_over_bump": {
"baseline": 2.87,
"tolerance_pct": 8
},
"rc_over_bump": {
"baseline": 2.76,
"baseline": 2.78,
"tolerance_pct": 8
},
"gc_rss_kb": {
"baseline": 137564.0,
"tolerance_pct": 5
},
"bump_rss_kb": {
"baseline": 97628.0,
"tolerance_pct": 5
},
"rc_rss_kb": {
"baseline": 193816.0,
"baseline": 193572.0,
"tolerance_pct": 5
}
},
"bench_compute_collatz": {
"gc_s": {
"baseline": 0.056628,
"tolerance_pct": 12
},
"bump_s": {
"baseline": 0.056266,
"baseline": 0.056148,
"tolerance_pct": 12
},
"rc_s": {
"baseline": 0.05629,
"baseline": 0.056289,
"tolerance_pct": 12
},
"gc_over_bump": {
"baseline": 1.01,
"tolerance_pct": 10
},
"rc_over_bump": {
"baseline": 1.0,
"tolerance_pct": 10
},
"gc_rss_kb": {
"baseline": 13860.0,
"tolerance_pct": 15
},
"bump_rss_kb": {
"baseline": 14044.0,
"baseline": 13840.0,
"tolerance_pct": 15
},
"rc_rss_kb": {
"baseline": 14012.0,
"baseline": 14000.0,
"tolerance_pct": 15
}
},
"bench_list_sum_explicit": {
"gc_s": {
"baseline": 0.1506,
"tolerance_pct": 10
},
"bump_s": {
"baseline": 0.053389,
"baseline": 0.052832,
"tolerance_pct": 10
},
"rc_s": {
"baseline": 0.15632,
"baseline": 0.158251,
"tolerance_pct": 10
},
"gc_over_bump": {
"baseline": 2.82,
"tolerance_pct": 8
},
"rc_over_bump": {
"baseline": 2.93,
"baseline": 3.0,
"tolerance_pct": 8
},
"gc_rss_kb": {
"baseline": 137196.0,
"tolerance_pct": 5
},
"bump_rss_kb": {
"baseline": 97628.0,
"baseline": 97436.0,
"tolerance_pct": 5
},
"rc_rss_kb": {
"baseline": 141988.0,
"baseline": 141796.0,
"tolerance_pct": 8
}
}
},
"latency": {
"implicit_at_gc": {
"median_us": {
"baseline": 97.6,
"tolerance_pct": 15
},
"p99_us": {
"baseline": 7125.8,
"tolerance_pct": 20
},
"p99_over_median": {
"baseline": 72.79,
"tolerance_pct": 20
}
},
"explicit_at_rc": {
"median_us": {
"baseline": 221.2,
"baseline": 218.8,
"tolerance_pct": 15
},
"p99_us": {
"baseline": 428.8,
"baseline": 259.9,
"tolerance_pct": 25
},
"p99_over_median": {
"baseline": 1.93,
"baseline": 1.19,
"tolerance_pct": 25
}
},
"implicit_at_rc": {
"median_us": {
"baseline": 301.2,
"baseline": 303.5,
"tolerance_pct": 15
},
"p99_us": {
"baseline": 461.8,
"baseline": 469.0,
"tolerance_pct": 20
},
"p99_over_median": {
"baseline": 1.53,
"baseline": 1.54,
"tolerance_pct": 20
}
}
bench/check.py
+8 -12
View File
@@ -59,7 +59,7 @@ def parse_throughput_table(text: str) -> dict[str, dict[str, float]]:
out: dict[str, dict[str, float]] = {}
in_table = False
for line in text.splitlines():
if line.startswith("workload") and "gc(s)" in line:
if line.startswith("workload") and "bump(s)" in line:
in_table = True
continue
if in_table and line.startswith("---"):
@@ -69,29 +69,25 @@ def parse_throughput_table(text: str) -> dict[str, dict[str, float]]:
in_table = False
continue
cells = [c.strip() for c in line.split("|")]
if len(cells) != 9:
if len(cells) != 6:
continue
workload = cells[0]
try:
out[workload] = {
"gc_s": float(cells[1]),
"bump_s": float(cells[2]),
"rc_s": float(cells[3]),
"gc_over_bump": float(cells[4].rstrip("x")),
"rc_over_bump": float(cells[5].rstrip("x")),
"gc_rss_kb": float(cells[6]),
"bump_rss_kb": float(cells[7]),
"rc_rss_kb": float(cells[8]),
"bump_s": float(cells[1]),
"rc_s": float(cells[2]),
"rc_over_bump": float(cells[3].rstrip("x")),
"bump_rss_kb": float(cells[4]),
"rc_rss_kb": float(cells[5]),
}
except ValueError:
continue
return out
# Latency arm header looks like: "=== implicit @ gc (Boehm-fair) ===".
# Latency arm header looks like: "=== explicit @ rc (RC-fair) ===".
# We map the leading prose label to the canonical arm key in baseline.json.
ARM_LABEL_TO_KEY = {
"implicit @ gc": "implicit_at_gc",
"explicit @ rc": "explicit_at_rc",
"implicit @ rc": "implicit_at_rc",
}
bench/orchestrator-stats/2026-05-20-iter-boehm-retirement.1.json
+23
View File
@@ -0,0 +1,23 @@
{
"iter_id": "boehm-retirement.1",
"date": "2026-05-20",
"mode": "standard",
"outcome": "DONE",
"tasks_total": 10,
"tasks_completed": 10,
"reloops_per_task": {
"1": 0,
"2": 0,
"3": 0,
"4": 0,
"5": 0,
"6": 0,
"7": 0,
"8": 0,
"9": 0,
"10": 0
},
"review_loops_spec": 0,
"review_loops_quality": 0,
"blocked_reason": null
}
bench/run.sh
+24 -27
View File
@@ -1,14 +1,16 @@
#!/usr/bin/env bash
#
# GC-overhead bench harness (Bench iter).
# RC-overhead bench harness.
#
# Builds each fixture twice — `--alloc=gc` (Boehm conservative GC) and
# `--alloc=bump` (no-free 256 MB arena from `runtime/bump.c`). Runs each
# binary N times, drops the slowest run, takes the median wall time.
# The bump number minus the gc number is the upper-bound cost of GC.
# Builds each fixture twice — `--alloc=rc` (canonical RC runtime) and
# `--alloc=bump` (no-free 256 MB arena from `runtime/bump.c`, the
# raw-alloc bench-floor). Runs each binary N times, drops the slowest
# run, takes the median wall time. The rc-over-bump ratio is the
# bench-health regression gate.
#
# Output: a table with gc-median, bump-median, overhead %, and max RSS
# for both modes. Designed to be captured verbatim into a commit body.
# Output: a table with bump-median, rc-median, rc/bump ratio, and max
# RSS for both modes. Designed to be captured verbatim into a commit
# body.
#
# Requirements: bash, /usr/bin/time -v (GNU coreutils), bc, sort, awk,
# a release-mode `ail` binary.
@@ -62,7 +64,7 @@ mkdir -p "$OUTDIR"
# Compile both modes for both fixtures up front so the bench loop only
# measures runtime, not build time.
fixtures=(bench_list_sum bench_tree_walk bench_closure_chain bench_hof_pipeline bench_compute_collatz bench_list_sum_explicit)
modes=(gc bump rc)
modes=(bump rc)
echo ">>> compiling fixtures (-O2)"
for f in "${fixtures[@]}"; do
src="$ROOT/examples/$f.ail"
@@ -150,30 +152,28 @@ echo
echo ">>> timing (RUNS=$RUNS, drop slowest, median of $((RUNS - 1)))"
echo
# Header. Iter 18f added the rc column + an "rc/bump" ratio, the
# decisive number for Decision 10's Boehm-retirement target (1.3x).
printf "%-22s | %10s | %10s | %10s | %10s | %10s | %12s | %12s | %12s\n" \
"workload" "gc(s)" "bump(s)" "rc(s)" "gc/bump" "rc/bump" "gc RSS(KB)" "bump RSS(KB)" "rc RSS(KB)"
printf -- "-----------------------+------------+------------+------------+------------+------------+--------------+--------------+--------------\n"
# Header. The rc/bump ratio is the RC-overhead-vs-bump bench-health
# regression gate (1.3× ceiling on linear/tree corpus, ±15% on
# closure-chain).
printf "%-22s | %10s | %10s | %10s | %12s | %12s\n" \
"workload" "bump(s)" "rc(s)" "rc/bump" "bump RSS(KB)" "rc RSS(KB)"
printf -- "-----------------------+------------+------------+------------+--------------+--------------\n"
for f in "${fixtures[@]}"; do
read -r gc_t gc_r < <(median_run "$OUTDIR/${f}_gc")
read -r bp_t bp_r < <(median_run "$OUTDIR/${f}_bump")
read -r rc_t rc_r < <(median_run "$OUTDIR/${f}_rc")
# Guard against bump_t == 0 (LLVM-folded sub-microsecond fixtures).
gc_ratio=$(awk -v g="$gc_t" -v b="$bp_t" 'BEGIN { if (b+0 == 0) printf "n/a"; else printf "%.2fx", g / b }')
rc_ratio=$(awk -v r="$rc_t" -v b="$bp_t" 'BEGIN { if (b+0 == 0) printf "n/a"; else printf "%.2fx", r / b }')
printf "%-22s | %10s | %10s | %10s | %10s | %10s | %12s | %12s | %12s\n" \
"$f" "$gc_t" "$bp_t" "$rc_t" "$gc_ratio" "$rc_ratio" "$gc_r" "$bp_r" "$rc_r"
printf "%-22s | %10s | %10s | %10s | %12s | %12s\n" \
"$f" "$bp_t" "$rc_t" "$rc_ratio" "$bp_r" "$rc_r"
done
# Iter 18g tidy: latency bench. The throughput table above is wall-
# time-and-RSS — the wrong metric for Decision 10's real-time claim.
# Latency bench. The throughput table above is wall-time-and-RSS;
# `bench/latency_harness.py` measures per-operation tail latency
# (median + p99 + p99.9 + max) on PTY-line-buffered stdout for the
# `bench_latency_*` fixtures. We invoke it for the three canonical
# arms (Boehm-fair Implicit @ gc, RC-fair explicit @ rc, control
# Implicit @ rc) and emit a second table.
# `bench_latency_*` fixtures. We invoke it for the two RC arms
# (RC-fair explicit @ rc, implicit-mode @ rc as control) and emit a
# second table.
#
# Skipped if the harness / fixtures aren't present (the latency bench
# was added in 18f.2 and may not exist on older branches that share
@@ -186,8 +186,7 @@ if [[ -x "$LAT_HARNESS" && -f "$LAT_IMPL_SRC" && -f "$LAT_EXPL_SRC" ]]; then
echo ">>> latency bench (PTY inter-arrival, 1000 samples per arm)"
echo
# Build the three arms. -O2 to match the throughput table.
"$AIL" build --opt=-O2 --alloc=gc "$LAT_IMPL_SRC" -o "$OUTDIR/bench_latency_implicit_gc" >/dev/null
# Build the two RC arms. -O2 to match the throughput table.
"$AIL" build --opt=-O2 --alloc=rc "$LAT_EXPL_SRC" -o "$OUTDIR/bench_latency_explicit_rc" >/dev/null
"$AIL" build --opt=-O2 --alloc=rc "$LAT_IMPL_SRC" -o "$OUTDIR/bench_latency_implicit_rc" >/dev/null
@@ -197,11 +196,9 @@ if [[ -x "$LAT_HARNESS" && -f "$LAT_IMPL_SRC" && -f "$LAT_EXPL_SRC" ]]; then
# each arm five times; the harness drops the slowest run and
# reports median + range per cell, matching the throughput
# table's drop-slowest convention.
"$PY" "$LAT_HARNESS" "$OUTDIR/bench_latency_implicit_gc" --runs 5 --label "implicit @ gc (Boehm-fair)"
echo
"$PY" "$LAT_HARNESS" "$OUTDIR/bench_latency_explicit_rc" --runs 5 --label "explicit @ rc (RC-fair)"
echo
"$PY" "$LAT_HARNESS" "$OUTDIR/bench_latency_implicit_rc" --runs 5 --label "implicit @ rc (control: leaks, no STW)"
"$PY" "$LAT_HARNESS" "$OUTDIR/bench_latency_implicit_rc" --runs 5 --label "implicit @ rc (control)"
fi
echo