docs(contracts): finish the honesty pass (0003, 0008, 0013, 0017)
Third tranche, completing the honesty-rule sweep across the remaining
contracts. Same conservative bar: cut unbacked-verification claims,
change/deletion history, and forward-intent; keep present-state design
rationale.
- 0003: drop "sanitiser-verified" — no TSan/sanitiser test exists in
the tree, so the claim asserts a verification that does not happen.
The data-race-freedom property (argued from the non-atomic-but-never-
shared hot path + atomic-relaxed shared counter) stays.
- 0008: the `Type::Con.name` hash paragraph ("the tightening shifted
the hashes ... The new pins ... re-asserts the pre-tightening hashes")
-> present-state: which fixtures carry which hash shape and which test
pins each.
- 0013: drop "the former codegen-side fallback (at ..., and the
now-deleted `synth_with_extras`) is retracted" (deletion history; the
present fact is that codegen does not re-resolve, per the boundary);
"A future refactor that loosens any one of the four breaks ..." ->
present-tense statement that the four are load-bearing and each pinned.
- 0017: drop "a real cost surfaced by the `bench_closure_chain`
regression at the operator-routing-eq-ord milestone" (history) and
"the symmetric extensions are mechanical when the first such workload
appears" (forward-intent); keep the present-state allocation cost, the
pin, and the Int-only-asymmetry rationale.
All 18 contracts now reviewed against the code. Ledger pins green;
honesty sweep clean.
This commit is contained in:
@@ -38,7 +38,7 @@ thread (`Ctx: !Send`) and each `ailang_ctx_t` is
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single-thread-per-ctx. The one datum a multi-threaded host shares
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single-thread-per-ctx. The one datum a multi-threaded host shares
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is the global RC-stats fallback counter (used when no ctx is
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is the global RC-stats fallback counter (used when no ctx is
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bound); it is atomic-relaxed so the swarm's leak accounting is
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bound); it is atomic-relaxed so the swarm's leak accounting is
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exact. The swarm artefact is data-race-free, sanitiser-verified.
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exact. The swarm artefact is data-race-free by this split.
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The staticlib swarm artefact is **RC-only**:
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The staticlib swarm artefact is **RC-only**:
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`ail build --emit=staticlib` rejects `--alloc=bump` (the bench
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`ail build --emit=staticlib` rejects `--alloc=bump` (the bench
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stub is leak-only and not swarm-safe; `--alloc=gc` no longer
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stub is leak-only and not swarm-safe; `--alloc=gc` no longer
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@@ -162,15 +162,12 @@ Skipped from serialisation when empty so existing fixtures keep
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bit-identical canonical-JSON hashes (regression-pinned by
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bit-identical canonical-JSON hashes (regression-pinned by
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`iter19b_empty_suppress_preserves_pre_19b_hashes` and
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`iter19b_empty_suppress_preserves_pre_19b_hashes` and
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`iter19b_schema_extension_preserves_pre_19b_hashes`).
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`iter19b_schema_extension_preserves_pre_19b_hashes`).
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The canonical-form tightening for `Type::Con.name` shifted the
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Two cross-module fixtures (`ordering_match.ail.json` and
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hashes of two cross-module fixtures (`ordering_match.ail.json` and
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`test_22b1_dup_a.ail.json`) carry canonical-form `Type::Con.name`
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`test_22b1_dup_a.ail.json`); all intra-module fixtures, including
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hashes, pinned by `ct4_migrated_fixtures_have_canonical_form_hashes`;
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the regression-pinned `sum.ail.json` and `list.ail.json`, remain
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all intra-module fixtures, including `sum.ail.json` and
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bit-identical. The new pins are
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`list.ail.json`, are pinned bit-identical by
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`ct4_migrated_fixtures_have_canonical_form_hashes` (locks the
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`ct4_unmigrated_fixtures_remain_bit_identical`.
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post-migration hashes) and
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`ct4_unmigrated_fixtures_remain_bit_identical` (re-asserts the
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pre-tightening hashes still hold).
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## Advisory diagnostics
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## Advisory diagnostics
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@@ -115,10 +115,7 @@ Three invariants make this work:
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the callee against the workspace and emits
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the callee against the workspace and emits
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`Callee::Static { module, fn_name, .. }` carrying the resolved owner.
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`Callee::Static { module, fn_name, .. }` carrying the resolved owner.
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Codegen consumes that identity off the MIR `App` node and does
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Codegen consumes that identity off the MIR `App` node and does
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**not** re-resolve it — the former codegen-side
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**not** re-resolve it, per the
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`import_map`-then-`module_user_fns` fallback (at `resolve_top_level_fn`,
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`lower_app`'s cross-module arm, and the now-deleted
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`synth_with_extras`) is retracted, per the
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[check→codegen boundary](0018-check-codegen-boundary.md). Both ends
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[check→codegen boundary](0018-check-codegen-boundary.md). Both ends
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were independently typechecked under their own module contexts before
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were independently typechecked under their own module contexts before
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mono ran; the cross-module reference is a post-mono construct, not a
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mono ran; the cross-module reference is a post-mono construct, not a
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@@ -163,9 +160,8 @@ cross-module reference, invariant (2) makes codegen able to resolve
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post-mono references, invariant (3) makes the typecheck-time
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post-mono references, invariant (3) makes the typecheck-time
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discharge fire correctly when no instance exists, invariant (4)
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discharge fire correctly when no instance exists, invariant (4)
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makes bare prelude-fn names resolve from user modules at the source
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makes bare prelude-fn names resolve from user modules at the source
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level. A future refactor that loosens any one of the four breaks
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level. Loosening any one breaks the user-ADT trajectory or the
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the user-ADT trajectory or the Float-named-fn surface; the test
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Float-named-fn surface, so each is pinned:
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pins at
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`crates/ail/tests/codegen_import_map_fallback_pin.rs` (invariant 2),
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`crates/ail/tests/codegen_import_map_fallback_pin.rs` (invariant 2),
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`crates/ail/tests/polyfn_dot_qualified_branch_pin.rs` (invariant 3
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`crates/ail/tests/polyfn_dot_qualified_branch_pin.rs` (invariant 3
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+ lockstep), `crates/ail/tests/float_compare_smoke_e2e.rs`
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+ lockstep), `crates/ail/tests/float_compare_smoke_e2e.rs`
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@@ -25,15 +25,13 @@ codegen intercept short-circuits this indirection: `lt__Int`,
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overridden to emit `icmp slt i64` / `sle i64` / `sgt i64` /
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overridden to emit `icmp slt i64` / `sle i64` / `sgt i64` /
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`sge i64` / `ne i64` directly, bypassing the `compare__Int` →
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`sge i64` / `ne i64` directly, bypassing the `compare__Int` →
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`Ordering`-ctor → `match` path. Without this short-circuit the
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`Ordering`-ctor → `match` path. Without this short-circuit the
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`Ordering` ctor allocates per call inside hot loops — a real
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`Ordering` ctor allocates per call inside hot loops; the
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cost surfaced by the `bench_closure_chain` regression at the
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short-circuit is pinned by
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operator-routing-eq-ord milestone and pinned by
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`crates/ail/tests/ord_int_intercept_ir_pin.rs`. It
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`crates/ail/tests/ord_int_intercept_ir_pin.rs`. The short-circuit
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is *Int-only* by deliberate asymmetry: no current bench or
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is *Int-only* by deliberate asymmetry: no current bench or
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example fixture exercises Ord-`lt`/`le`/`gt`/`ge` at Bool or
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example fixture exercises Ord-`lt`/`le`/`gt`/`ge` at Bool or
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Str at sufficient call frequency to justify the intercept-arm
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Str at sufficient call frequency to justify the intercept-arm
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maintenance; the symmetric extensions are mechanical when the
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maintenance.
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first such workload appears.
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Float has neither `Eq` nor `Ord` instance per [Float semantics](
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Float has neither `Eq` nor `Ord` instance per [Float semantics](
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0005-float-semantics.md); a polymorphic helper invoked at Float fires
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0005-float-semantics.md); a polymorphic helper invoked at Float fires
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