Flat array/slice primitive

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CLOSED 2026-05-28: superseded by milestone #7 raw-buf. The same primitive (mutable indexed flat buffer of Int/Float/Bool elements) is now scoped under the kernel-extensions architecture. The Embedding-ABI batch-crossing use case that motivated this milestone is folded into #7's description as a second consumer alongside the new series library extension. See design/models/kernel-extensions.md.


(original description preserved below)

Priority: P2 — Medium-term

Performance follow-up to the Embedding ABI arc, not a capability gap.

AILang's only sequence is the recursive List ADT (one RC cell per element). The ABI arc resolved chunk-crossing by having the M5 adapter unroll each data-server chunk host-side into per-tick (State, Tick) -> State calls (M4's cons-list crossing was retired as speculative infra) — so the residual perf question is no longer '1024-cell cons-chain per chunk' but host-per-tick-FFI vs. an eventual batch/flat-array crossing. M5's friction-harvest measured the per-tick FFI at ≈ ~206 ns/tick at real EURUSD volume (≈ 658 ms / 3.19 M ticks).

Open decision: whether a contiguous array/slice primitive (to amortise that per-tick cost via a batch crossing) is worth a language change — it interacts with uniqueness inference, RC, and the structurally-decreasing-recursion totality story, and is out of the (now-closed) ABI arc's scope. Now decidable on the measured number, not speculation.

depends on: Embedding ABI — M5 (shipped; measured ~206 ns/tick — the justification input now exists).

context: 2026-05-18 chat (user deferred this to keep the ABI arc clean); the friction-harvest number recorded in the M5 audit commit; M4 retirement decision recorded in the M5 closing commits.

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