Brummel
13e590cb46
Closes the raw-buf milestone. raw_buf (shipped raw-buf.1-.5; the
owned-drop resolution landed under bug #42/#43) has subsumed every
ratification role kernel_stub held -- Term::New end-to-end, the
param-in reject, kernel-tier auto-import, the monomorphic intrinsic
path, and the type-scoped polymorphic intrinsic mechanism (RawBuf's
four ops). The stub is now redundant; this iteration removes it.
Pure removal (-636/+49 across 22 files, 7 deleted):
- Rust surface: drop `mod kernel_stub` + `STUB_AIL` re-export
(ailang-kernel), `parse_kernel_stub` + its workspace injection
(ailang-surface), the `answer` + two `StubT_peek__{Int,Float}`
INTERCEPTS entries + their three emit fns (ailang-codegen). The
(intrinsic) markers leave with the deleted source, so the
marker<->entry bijection holds in lockstep.
- Source + tests: delete crates/ailang-kernel/src/kernel_stub/,
kernel_stub_module_round_trips, the two stub-consumer e2e tests,
and mono_scoped_symbol.rs (its scope-qualified-mono mechanism is
now pinned by RawBuf's ops + the intercepts bijection).
- Fixtures: delete kernel_answer.ail, new_stubt_smoke.ail,
peek_mono_pin_smoke.ail, and fieldtest kem_3_stub_consumer.ail
(referenced the deleted StubT; documented a since-fixed bug).
- Pins: re-baseline both workspace-count content-pins 5 -> 4
(workspace_pin.rs + the e2e.rs twin) and regenerate all five IR
snapshots (400 stub-IR lines removed; no user IR changed -- the
stub auto-injected into every build).
- Ledger: design/INDEX.md + design/models/0007 to present-state
(raw_buf is the live ratifier; raw-buf milestone shipped, series
pending), plus architecture-comment sweep across workspace.rs,
mono.rs, check/codegen lib.rs, workspace_kernel.rs.
Scope decisions (orchestrator, pre-plan): the self-contained inline
serde_json check-layer fixtures in ailang-check/src/lib.rs keep their
incidental StubT/kernel_stub sample names (they construct what they
reference; not stub-ratification) -- the one permitted residual.
kem_4 fieldtest kept (uses a user NumBox ADT, comment-only edit).
hash.rs `name: "answer"` left (generic serde doc example).
Plan-gap caught at implement: the planner's verbatim edit list
under-enumerated four honesty sites; one (mono.rs:562) carried a
literal `StubT_peek__Int` -- a hard-gate symbol the verbatim list
missed, which would have failed Task 4's removal gate. Filled
(comment-only, no behaviour). Confirms the planner self-review
filter-completeness risk; the implement gate caught it.
Verification: full workspace suite green (0 failed); hard symbol gate
(STUB_AIL|parse_kernel_stub|emit_answer|emit_stubt_peek|StubT_peek__)
zero matches across crates/ examples/ design/; soft gate residual only
the kept inline fixtures; kernel crate is lib.rs + raw_buf/ only.
Regression: compile_check 24/24 stable (exit 0; uniform downward
check_ms within tol -- stub no longer parsed per compile), cross_lang
25/25, check 34/34 stable (exit 0; an earlier exit-1 on
rc_over_bump was machine-load ratio noise -- denominator bump_s got
faster, rc_s also improved -- confirmed green on re-run, not
baselined).
262 lines
6.8 KiB
LLVM
262 lines
6.8 KiB
LLVM
; AILang generated workspace; entry: sum
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source_filename = "sum.ail"
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target triple = "<NORMALIZED>"
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declare i32 @printf(ptr, ...)
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declare i32 @fputs(ptr, ptr)
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@stdout = external global ptr
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declare ptr @ailang_rc_alloc(i64)
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declare void @ailang_rc_inc(ptr)
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declare void @ailang_rc_dec(ptr)
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declare ptr @ailang_drop_worklist_new()
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declare void @ailang_drop_worklist_push(ptr, ptr)
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declare ptr @ailang_drop_worklist_pop(ptr)
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declare void @ailang_drop_worklist_free(ptr)
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declare i32 @strcmp(ptr, ptr)
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declare zeroext i1 @ail_str_eq(ptr, ptr)
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declare i32 @ail_str_compare(ptr, ptr)
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declare ptr @ailang_int_to_str(i64)
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declare ptr @ailang_float_to_str(double)
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declare ptr @ailang_bool_to_str(i1)
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declare ptr @ailang_str_clone(ptr)
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declare ptr @ailang_str_concat(ptr, ptr)
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declare i64 @llvm.fptosi.sat.i64.f64(double)
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@ail_prelude_float_eq_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_eq_adapter, ptr null }
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@ail_prelude_float_ne_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_ne_adapter, ptr null }
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@ail_prelude_float_lt_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_lt_adapter, ptr null }
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@ail_prelude_float_le_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_le_adapter, ptr null }
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@ail_prelude_float_gt_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_gt_adapter, ptr null }
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@ail_prelude_float_ge_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_ge_adapter, ptr null }
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@ail_prelude_eq__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_eq__Int_adapter, ptr null }
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@ail_prelude_show__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_show__Int_adapter, ptr null }
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@ail_prelude_print__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_print__Int_adapter, ptr null }
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@ail_sum_sum_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_sum_sum_adapter, ptr null }
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@ail_sum_main_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_sum_main_adapter, ptr null }
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define i1 @ail_prelude_float_eq(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp oeq double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_eq_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_eq(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_ne(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp une double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_ne_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_ne(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_lt(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp olt double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_lt_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_lt(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_le(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp ole double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_le_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_le(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_gt(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp ogt double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_gt_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_gt(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_ge(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp oge double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_ge_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_ge(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_eq__Int(i64 %arg_x, i64 %arg_y) alwaysinline {
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entry:
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%v1 = icmp eq i64 %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_eq__Int_adapter(ptr %_env, i64 %a0, i64 %a1) {
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entry:
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%r = call i1 @ail_prelude_eq__Int(i64 %a0, i64 %a1)
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ret i1 %r
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}
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define ptr @ail_prelude_show__Int(i64 %arg_x) {
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entry:
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%v1 = call ptr @ailang_int_to_str(i64 %arg_x)
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ret ptr %v1
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}
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define ptr @ail_prelude_show__Int_adapter(ptr %_env, i64 %a0) {
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entry:
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%r = call ptr @ail_prelude_show__Int(i64 %a0)
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ret ptr %r
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}
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define i8 @ail_prelude_print__Int(i64 %arg_x) {
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entry:
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%v1 = call ptr @ail_prelude_show__Int(i64 %arg_x)
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%v2 = getelementptr inbounds i8, ptr %v1, i64 8
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%v3 = load ptr, ptr @stdout, align 8
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call i32 @fputs(ptr %v2, ptr %v3)
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call void @ailang_rc_dec(ptr %v1)
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ret i8 0
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}
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define i8 @ail_prelude_print__Int_adapter(ptr %_env, i64 %a0) {
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entry:
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%r = call i8 @ail_prelude_print__Int(i64 %a0)
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ret i8 %r
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}
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define void @drop_prelude_Ordering(ptr %p) {
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entry:
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%is_null = icmp eq ptr %p, null
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br i1 %is_null, label %ret, label %live
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live:
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%tag = load i64, ptr %p, align 8
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switch i64 %tag, label %dflt [
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i64 0, label %arm_0
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i64 1, label %arm_1
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i64 2, label %arm_2
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]
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arm_0:
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br label %join
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arm_1:
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br label %join
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arm_2:
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br label %join
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dflt:
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unreachable
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join:
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call void @ailang_rc_dec(ptr %p)
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br label %ret
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ret:
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ret void
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}
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define void @partial_drop_prelude_Ordering(ptr %p, i64 %mask) {
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entry:
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%is_null = icmp eq ptr %p, null
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br i1 %is_null, label %ret, label %live
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live:
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%tag = load i64, ptr %p, align 8
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switch i64 %tag, label %dflt [
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i64 0, label %arm_0
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i64 1, label %arm_1
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i64 2, label %arm_2
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]
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arm_0:
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br label %join
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arm_1:
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br label %join
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arm_2:
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br label %join
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dflt:
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unreachable
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join:
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call void @ailang_rc_dec(ptr %p)
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br label %ret
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ret:
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ret void
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}
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define void @drop_raw_buf_RawBuf(ptr %p) {
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entry:
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%is_null = icmp eq ptr %p, null
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br i1 %is_null, label %ret, label %live
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live:
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call void @ailang_rc_dec(ptr %p)
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br label %ret
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ret:
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ret void
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}
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define void @partial_drop_raw_buf_RawBuf(ptr %p, i64 %mask) {
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entry:
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%is_null = icmp eq ptr %p, null
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br i1 %is_null, label %ret, label %live
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live:
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call void @ailang_rc_dec(ptr %p)
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br label %ret
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ret:
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ret void
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}
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define i64 @ail_sum_sum(i64 %arg_n) {
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entry:
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%v1 = call i1 @ail_prelude_eq__Int(i64 %arg_n, i64 0)
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br i1 %v1, label %then.2, label %else.2
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then.2:
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br label %join.2
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else.2:
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%v3 = sub i64 %arg_n, 1
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%v4 = call i64 @ail_sum_sum(i64 %v3)
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%v5 = add i64 %arg_n, %v4
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br label %join.2
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join.2:
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%v6 = phi i64 [ 0, %then.2 ], [ %v5, %else.2 ]
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ret i64 %v6
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}
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define i64 @ail_sum_sum_adapter(ptr %_env, i64 %a0) {
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entry:
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%r = call i64 @ail_sum_sum(i64 %a0)
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ret i64 %r
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}
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define i8 @ail_sum_main() {
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entry:
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%v1 = call i64 @ail_sum_sum(i64 10)
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%v2 = call i8 @ail_prelude_print__Int(i64 %v1)
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ret i8 %v2
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}
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define i8 @ail_sum_main_adapter(ptr %_env) {
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entry:
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%r = call i8 @ail_sum_main()
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ret i8 %r
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}
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define i32 @main() {
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call i8 @ail_sum_main()
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ret i32 0
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}
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