Brummel
26fb3459d8
The runtime print path now writes exactly the bytes of its
argument with no implicit trailing newline. `io/print_str` is
byte-faithful; authors who want a newline emit `(do io/print_str
"\n")` themselves.
## Codegen
`crates/ailang-codegen/src/lib.rs`:
- Module preamble: `@puts(ptr)` → `@fputs(ptr, ptr)` plus
`@stdout = external global ptr` (libc's `FILE *stdout`).
- Effect-op lowering for `io/print_str`: emit
`getelementptr +8` then `load ptr, ptr @stdout` then
`call/tail call i32 @fputs(ptr bytes, ptr fp)`. Identical
bytes-pointer GEP, distinct sink.
- The pinned IR-shape test renames from
`print_str_calls_puts_with_bytes_pointer` to
`print_str_calls_fputs_with_bytes_pointer_and_stdout` and now
asserts: bytes-GEP present, stdout-load present, both module-
preamble declarations present, and no `@puts(` call anywhere
in the emitted IR.
## Why this shape, and not the alternatives
- *Rename `io/print_str` to `io/println_str` (issue #29 option 2)*
— kept the auto-newline, just relabelled it. AILang's design
bias is explicit-over-implicit (CLAUDE.md: implicit conversions
cut). Auto-newline is a hidden runtime augmentation; the rename
would have preserved it. Rejected.
- *Append `\n` inside the polymorphic `print` (Show-mediated)
function in `examples/prelude.ail`* — would have been a one-line
fix. Rejected: `print` is the Show-mediated formatter, not a
newline emitter; baking a newline into it would have re-imposed
the same implicit-augmentation problem one layer up, breaking
callers that legitimately want pure-bytes output.
## Fixture / test sweep
30 `.ail` fixtures whose owning tests asserted line-separated
stdout now emit explicit `(do io/print_str "\n")` after each
print. Tests that asserted on multi-line stdout (`show_print_e2e`,
`floats_e2e`, `str_concat_e2e`, `eq_ord_e2e`, several `print_*`
smoke tests) had their fixtures sweetened the same way; assertions
themselves remain the canonical observable output. Fixtures that
never relied on the newline (no test ever read the absence of one)
were left untouched.
## Migrated metadata
- `crates/ailang-core/tests/hash_pin.rs`: the `ordering_match::main`
canonical hash is refreshed (`b65a7f834703ffb4` →
`8ed47b4062ce00f5`). The comment now names both successive
corpus migrations honestly: the per-type-print-retirement (which
moved `(do io/print_int x)` to `(app print x)`) AND this
fputs swap (which wrapped that with `(seq ... (do io/print_str
"\n"))`).
- `design/contracts/str-abi.md`: the consumer-ABI table now lists
`@fputs` as the print sink. A prose paragraph documents the
byte-faithful semantics and references this issue.
- `examples/ordering_match.prose.txt`: regenerated from the
updated `ordering_match.ail`.
- `crates/ail/tests/snapshots/{hello,sum,max3,list,ws_main}.ll`:
IR snapshots regenerated via `UPDATE_SNAPSHOTS=1`.
- Stale `@puts` comments in `runtime/str.c`,
`crates/ail/tests/{e2e,show_print_e2e,print_no_leak_pin}.rs`
replaced with `@fputs`.
## Verification
- `cargo test -p ail --test print_str_no_auto_newline_e2e` — both
RED tests from commit c8ecfa3 now pass.
- `cargo test --workspace` — 90 test groups GREEN, 0 failures.
- `cargo build --workspace` — GREEN.
- No new clippy lints (24 warnings pre-existing in
`crates/ailang-core/src/lib.rs:129`).
- Stats: `bench/orchestrator-stats/2026-05-21-iter-bugfix-print-
str-fputs.json` — 1/1 tasks, 0 re-loops, 0 review loops.
## Empirical evidence cited
Caught in the 2026-05-21 Qwen3-Coder naming-A/B run
(`experiments/2026-05-21-naming-ab/runs/r1/`): every cohort wrote
`(do io/print_str "...\n")` with explicit `\n` and got doubled
newlines, failing the `t3_main_prints` stdout match across all
three cohorts. The empirical LLM-natural form already assumes the
new (post-this-commit) semantics — confirming the
feature-acceptance test in CLAUDE.md.
closes #29
301 lines
8.2 KiB
LLVM
301 lines
8.2 KiB
LLVM
; AILang generated workspace; entry: max3
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source_filename = "max3.ail"
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target triple = "<NORMALIZED>"
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declare i32 @printf(ptr, ...)
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declare i32 @fputs(ptr, ptr)
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@stdout = external global ptr
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declare ptr @ailang_rc_alloc(i64)
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declare void @ailang_rc_inc(ptr)
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declare void @ailang_rc_dec(ptr)
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declare ptr @ailang_drop_worklist_new()
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declare void @ailang_drop_worklist_push(ptr, ptr)
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declare ptr @ailang_drop_worklist_pop(ptr)
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declare void @ailang_drop_worklist_free(ptr)
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declare i32 @strcmp(ptr, ptr)
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declare zeroext i1 @ail_str_eq(ptr, ptr)
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declare i32 @ail_str_compare(ptr, ptr)
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declare ptr @ailang_int_to_str(i64)
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declare ptr @ailang_float_to_str(double)
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declare ptr @ailang_bool_to_str(i1)
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declare ptr @ailang_str_clone(ptr)
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declare ptr @ailang_str_concat(ptr, ptr)
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declare i64 @llvm.fptosi.sat.i64.f64(double)
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@ail_max3_max_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_max3_max_adapter, ptr null }
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@ail_max3_max3_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_max3_max3_adapter, ptr null }
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@ail_max3_main_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_max3_main_adapter, ptr null }
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@ail_prelude_float_eq_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_eq_adapter, ptr null }
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@ail_prelude_float_ne_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_ne_adapter, ptr null }
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@ail_prelude_float_lt_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_lt_adapter, ptr null }
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@ail_prelude_float_le_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_le_adapter, ptr null }
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@ail_prelude_float_gt_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_gt_adapter, ptr null }
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@ail_prelude_float_ge_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_ge_adapter, ptr null }
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@ail_prelude_compare__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_compare__Int_adapter, ptr null }
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@ail_prelude_gt__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_gt__Int_adapter, ptr null }
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@ail_prelude_show__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_show__Int_adapter, ptr null }
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@ail_prelude_print__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_print__Int_adapter, ptr null }
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define i64 @ail_max3_max(i64 %arg_a, i64 %arg_b) {
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entry:
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%v1 = call i1 @ail_prelude_gt__Int(i64 %arg_a, i64 %arg_b)
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br i1 %v1, label %then.2, label %else.2
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then.2:
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br label %join.2
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else.2:
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br label %join.2
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join.2:
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%v3 = phi i64 [ %arg_a, %then.2 ], [ %arg_b, %else.2 ]
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ret i64 %v3
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}
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define i64 @ail_max3_max_adapter(ptr %_env, i64 %a0, i64 %a1) {
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entry:
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%r = call i64 @ail_max3_max(i64 %a0, i64 %a1)
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ret i64 %r
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}
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define i64 @ail_max3_max3(i64 %arg_a, i64 %arg_b, i64 %arg_c) {
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entry:
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%v1 = call i1 @ail_prelude_gt__Int(i64 %arg_a, i64 %arg_b)
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br i1 %v1, label %then.2, label %else.2
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then.2:
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%v3 = call i1 @ail_prelude_gt__Int(i64 %arg_a, i64 %arg_c)
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br i1 %v3, label %then.4, label %else.4
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then.4:
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br label %join.4
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else.4:
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br label %join.4
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join.4:
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%v5 = phi i64 [ %arg_a, %then.4 ], [ %arg_c, %else.4 ]
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br label %join.2
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else.2:
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%v6 = call i1 @ail_prelude_gt__Int(i64 %arg_b, i64 %arg_c)
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br i1 %v6, label %then.7, label %else.7
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then.7:
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br label %join.7
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else.7:
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br label %join.7
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join.7:
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%v8 = phi i64 [ %arg_b, %then.7 ], [ %arg_c, %else.7 ]
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br label %join.2
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join.2:
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%v9 = phi i64 [ %v5, %join.4 ], [ %v8, %join.7 ]
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ret i64 %v9
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}
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define i64 @ail_max3_max3_adapter(ptr %_env, i64 %a0, i64 %a1, i64 %a2) {
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entry:
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%r = call i64 @ail_max3_max3(i64 %a0, i64 %a1, i64 %a2)
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ret i64 %r
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}
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define i8 @ail_max3_main() {
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entry:
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%v1 = call i64 @ail_max3_max3(i64 3, i64 17, i64 9)
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%v2 = call i8 @ail_prelude_print__Int(i64 %v1)
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ret i8 %v2
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}
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define i8 @ail_max3_main_adapter(ptr %_env) {
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entry:
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%r = call i8 @ail_max3_main()
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ret i8 %r
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}
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define i1 @ail_prelude_float_eq(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp oeq double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_eq_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_eq(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_ne(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp une double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_ne_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_ne(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_lt(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp olt double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_lt_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_lt(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_le(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp ole double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_le_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_le(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_gt(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp ogt double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_gt_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_gt(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_ge(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp oge double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_ge_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_ge(double %a0, double %a1)
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ret i1 %r
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}
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define ptr @ail_prelude_compare__Int(i64 %arg_x, i64 %arg_y) alwaysinline {
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entry:
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%v1 = icmp slt i64 %arg_x, %arg_y
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br i1 %v1, label %cmp_lt_2, label %cmp_after_lt_2
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cmp_lt_2:
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%v3 = call ptr @ailang_rc_alloc(i64 8)
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store i64 0, ptr %v3, align 8
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ret ptr %v3
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cmp_after_lt_2:
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%v4 = icmp eq i64 %arg_x, %arg_y
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br i1 %v4, label %cmp_eq_2, label %cmp_gt_2
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cmp_eq_2:
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%v5 = call ptr @ailang_rc_alloc(i64 8)
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store i64 1, ptr %v5, align 8
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ret ptr %v5
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cmp_gt_2:
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%v6 = call ptr @ailang_rc_alloc(i64 8)
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store i64 2, ptr %v6, align 8
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ret ptr %v6
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}
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define ptr @ail_prelude_compare__Int_adapter(ptr %_env, i64 %a0, i64 %a1) {
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entry:
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%r = call ptr @ail_prelude_compare__Int(i64 %a0, i64 %a1)
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ret ptr %r
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}
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define i1 @ail_prelude_gt__Int(i64 %arg_x, i64 %arg_y) alwaysinline {
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entry:
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%v1 = icmp sgt i64 %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_gt__Int_adapter(ptr %_env, i64 %a0, i64 %a1) {
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entry:
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%r = call i1 @ail_prelude_gt__Int(i64 %a0, i64 %a1)
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ret i1 %r
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}
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define ptr @ail_prelude_show__Int(i64 %arg_x) {
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entry:
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%v1 = call ptr @ailang_int_to_str(i64 %arg_x)
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ret ptr %v1
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}
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define ptr @ail_prelude_show__Int_adapter(ptr %_env, i64 %a0) {
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entry:
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%r = call ptr @ail_prelude_show__Int(i64 %a0)
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ret ptr %r
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}
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define i8 @ail_prelude_print__Int(i64 %arg_x) {
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entry:
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%v1 = call ptr @ail_prelude_show__Int(i64 %arg_x)
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%v2 = getelementptr inbounds i8, ptr %v1, i64 8
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%v3 = load ptr, ptr @stdout, align 8
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call i32 @fputs(ptr %v2, ptr %v3)
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call void @ailang_rc_dec(ptr %v1)
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ret i8 0
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}
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define i8 @ail_prelude_print__Int_adapter(ptr %_env, i64 %a0) {
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entry:
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%r = call i8 @ail_prelude_print__Int(i64 %a0)
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ret i8 %r
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}
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define void @drop_prelude_Ordering(ptr %p) {
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entry:
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%is_null = icmp eq ptr %p, null
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br i1 %is_null, label %ret, label %live
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live:
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%tag = load i64, ptr %p, align 8
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switch i64 %tag, label %dflt [
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i64 0, label %arm_0
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i64 1, label %arm_1
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i64 2, label %arm_2
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]
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arm_0:
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br label %join
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arm_1:
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br label %join
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arm_2:
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br label %join
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dflt:
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unreachable
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join:
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call void @ailang_rc_dec(ptr %p)
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br label %ret
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ret:
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ret void
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}
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define void @partial_drop_prelude_Ordering(ptr %p, i64 %mask) {
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entry:
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%is_null = icmp eq ptr %p, null
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br i1 %is_null, label %ret, label %live
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live:
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%tag = load i64, ptr %p, align 8
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switch i64 %tag, label %dflt [
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i64 0, label %arm_0
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i64 1, label %arm_1
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i64 2, label %arm_2
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]
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arm_0:
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br label %join
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arm_1:
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br label %join
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arm_2:
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br label %join
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dflt:
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unreachable
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join:
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call void @ailang_rc_dec(ptr %p)
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br label %ret
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ret:
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ret void
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}
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define i32 @main() {
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call i8 @ail_max3_main()
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ret i32 0
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}
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