Logo
Explore Help
Register Sign In
Brummel/AILang
1
0
Fork 0
You've already forked AILang
Code Issues 29 Pull Requests Actions Packages Projects Releases Wiki Activity
Files
548ebf8d51758ab9f156b266e0baa59c78b14034
AILang/bench
T
History
Brummel 805bba3fda iter ctt.1: env-overlay shape ratification + DuplicateCtor pin
2026-05-12 22:07:39 +02:00
..
orchestrator-stats
iter ctt.1: env-overlay shape ratification + DuplicateCtor pin
2026-05-12 22:07:39 +02:00
reference
iter ext-rename: .ailx → .ail across the live toolchain
2026-05-12 14:20:27 +02:00
architect_sweeps.sh
iter architect-iron-law.1: bench/architect_sweeps.sh runs the four design-md-consolidation sweeps against DESIGN.md
2026-05-10 20:01:47 +02:00
baseline_compile.json
audit 23: ratify compile_check baseline + DESIGN.md stub-fix
2026-05-12 00:57:12 +02:00
baseline_cross_lang.json
tidy: 21'g — resolve drift after 21'-arc close
2026-05-09 01:40:36 +02:00
baseline.json
tidy: 21'g — resolve drift after 21'-arc close
2026-05-09 01:40:36 +02:00
check.py
bench: regression harness — baseline.json + check.py
2026-05-09 00:36:06 +02:00
compile_check.py
tidy: 21'g — resolve drift after 21'-arc close
2026-05-09 01:40:36 +02:00
cross_lang.py
bench: 21'f — explicit-mode pair, full alloc+dec vs malloc+free
2026-05-09 01:21:15 +02:00
latency_harness.py
bench: latency_harness --runs N (stat-of-N, drop-slowest)
2026-05-08 15:17:53 +02:00
mono_dispatch.py
bench: mono-vs-vdisp micro-benchmark + revised Decision 11 rationale
2026-05-10 01:03:21 +02:00
run.sh
bench: 21'f — explicit-mode pair, full alloc+dec vs malloc+free
2026-05-09 01:21:15 +02:00
Powered by Gitea Version: 1.26.4 Page: 256ms Template: 2ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API