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76b21c00eb1be6cc656f2539e82f3bccab6c2ecf
AILang/crates/ail/tests/snapshots/list.ll
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Brummel 76b21c00eb feat(lang): eliminate the Implicit ownership default — totality + the drop-soundness it demasks (#55) 
Deletes `ParamMode::Implicit`. `ParamMode` is now `{Own, Borrow}`:
every fn-type slot on every signature carries an explicit `own` or
`borrow`, no defaulted position survives anywhere (model 0008 §2,
spec 0062). The parser rejects a bare fn-type slot; `borrow-return`
and `borrow-over-value` reject at the signature; the corpus is
migrated to minimal-ownership modes (consumed ⇒ own, read-only-heap
⇒ borrow, value ⇒ trivial-own). The documented `Implicit`-ret-mode
leak is fixed: an owned heap return now drops exactly once (live=0,
acceptance criterion 5).

This was the easy half. Removing the default ACTIVATED a family of
drop paths that `Implicit` had silently skipped — the pre-cutover
language was leaking (and in places mis-dropping) here rather than
crashing, because an Implicit scrutinee turned the drop off. Making
the modes explicit (Own) turned those paths on and exposed two
latent-bug clusters, all fixed RED-first as part of this cutover:

Drop-soundness family (four legs):
  A. lit-sub-pattern double-free — the desugar re-matched the same
     owned scrutinee in the lit fall-through; fixed by grouping
     consecutive same-ctor arms into one match (bind fields once),
     in ailang-core desugar.
  B. Cons-husk leak on non-tail arm bodies — the lit-sub-pattern
     desugar rebound the owned scrutinee via `Let $mp = xs`, which
     bumped consume_count and suppressed the existing fn-return
     partial_drop. Fixed by not rebinding a bare-Var scrutinee
     (one husk-freeing mechanism, not two).
  C. polymorphic `drop_<T>` rc_dec'd monomorphised value fields —
     the per-ADT drop fn was emitted once from the polymorphic
     TypeDef, defaulting type-var fields to ptr and rc_dec'ing
     inline Ints (segfault). Fixed with per-monomorph drop
     functions (new ailang-codegen::dropmono): the drop set is
     collected from the lowered MIR, value-type fields are skipped,
     heap fields still freed once; monomorphic-concrete ADTs keep
     their byte-identical un-suffixed drop symbol.
  D. static Str literal passed to an `(own Str)` param — the
     literal lowers to a header-less rodata constant; the callee's
     now-active rc_dec read its length field as a refcount and
     freed a static address (segfault). Fixed with the missing
     fourth StrRep::Static→Heap promotion in lower_to_mir's App arm,
     gated on Own mode (borrow args stay static, no regression).

over-strict-mode lint over-fired: it suggested `(borrow V)` for
value-typed params (which `borrow-over-value` rejects — own is the
only legal mode there) and fired on `(intrinsic)` bodies (whose
consumption the linearity walk cannot observe). Tightened to skip
both; contract 0008 updated to the narrowed firing scope.

Irreversible step — canonical-form hash reset (model 0008 §6,
acceptance criterion 6). Every signature now carries explicit modes,
so the hashable canonical JSON changed for every module. RATIFY:
the corpus-wide hash-pin reset (hash_pin, prelude_module_hash_pin,
mono_hash_stability, eq_ord_e2e, embed_export_hash_stable, the
ct4/iter*/loop_recur schema-extension pins) and the list ir_snapshot
golden were regenerated once, deliberately, as the intended one-time
consequence of removing the mode elision from the canonical form —
not a regression. Each regenerated hash verified deterministic across
two runs.

Also fixes a pre-existing latent failure surfaced by the verification
gate, unrelated to this cutover: the `every_contract_names_a_resolvable_
ratifying_test` resolver (design_index_pin) could not resolve the
" + " dual-link ratifying-test form (`uniqueness.rs + linearity.rs`)
that the #57 audit-close (dfdc65f) introduced — it shipped red on that
commit. Resolver taught the dual-link form, mirroring its sibling.

Verification: cargo test --workspace = 731 passed, 0 failed (twice,
stable); e2e 102 passed, no binary exits non-zero (corpus crash-free);
grep-clean for Implicit/fn_implicit/mode_eq across crates; every drop
fix confirmed via emitted IR + AILANG_RC_STATS balance on the head==K,
head!=K, and Nil paths. Three BLOCKEDs en route (the unsound first
husk-dec attempt, the over-strict derivation premise, the leg-B fix
direction) were each treated as a real design/spec gap and rediagnosed,
not patched over.

Supersedes #54 (return-position-only leak patch). Precondition #57
(linearity hardening) was already met. Spec docs/specs/0062, plan
docs/plans/0121.

closes #55
2026-06-02 00:03:46 +02:00

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; AILang generated workspace; entry: list
source_filename = "list.ail"
target triple = "<NORMALIZED>"
declare i32 @printf(ptr, ...)
declare i32 @fputs(ptr, ptr)
@stdout = external global ptr
declare ptr @ailang_rc_alloc(i64)
declare void @ailang_rc_inc(ptr)
declare void @ailang_rc_dec(ptr)
declare ptr @ailang_drop_worklist_new()
declare void @ailang_drop_worklist_push(ptr, ptr)
declare ptr @ailang_drop_worklist_pop(ptr)
declare void @ailang_drop_worklist_free(ptr)
declare i32 @strcmp(ptr, ptr)
declare zeroext i1 @ail_str_eq(ptr, ptr)
declare i32 @ail_str_compare(ptr, ptr)
declare ptr @ailang_int_to_str(i64)
declare ptr @ailang_float_to_str(double)
declare ptr @ailang_bool_to_str(i1)
declare ptr @ailang_str_clone(ptr)
declare ptr @ailang_str_concat(ptr, ptr)
declare i64 @llvm.fptosi.sat.i64.f64(double)
@ail_list_sum_list_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_list_sum_list_adapter, ptr null }
@ail_list_main_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_list_main_adapter, ptr null }
@ail_prelude_float_eq_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_eq_adapter, ptr null }
@ail_prelude_float_ne_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_ne_adapter, ptr null }
@ail_prelude_float_lt_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_lt_adapter, ptr null }
@ail_prelude_float_le_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_le_adapter, ptr null }
@ail_prelude_float_gt_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_gt_adapter, ptr null }
@ail_prelude_float_ge_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_ge_adapter, ptr null }
@ail_prelude_show__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_show__Int_adapter, ptr null }
@ail_prelude_print__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_print__Int_adapter, ptr null }
define i64 @ail_list_sum_list(ptr %arg_xs) {
entry:
%v1 = load i64, ptr %arg_xs, align 8
switch i64 %v1, label %mdefault.2 [
i64 0, label %marm.2.0
i64 1, label %marm.2.1
]
marm.2.0:
br label %mjoin.2
marm.2.1:
%v3 = getelementptr inbounds i8, ptr %arg_xs, i64 8
%v4 = load i64, ptr %v3, align 8
%v5 = getelementptr inbounds i8, ptr %arg_xs, i64 16
%v6 = load ptr, ptr %v5, align 8
%v7 = call i64 @ail_list_sum_list(ptr %v6)
%v8 = add i64 %v4, %v7
br label %mjoin.2
mdefault.2:
unreachable
mjoin.2:
%v9 = phi i64 [ 0, %marm.2.0 ], [ %v8, %marm.2.1 ]
call void @partial_drop_list_IntList(ptr %arg_xs, i64 2)
ret i64 %v9
}
define i64 @ail_list_sum_list_adapter(ptr %_env, ptr %a0) {
entry:
%r = call i64 @ail_list_sum_list(ptr %a0)
ret i64 %r
}
define i8 @ail_list_main() {
entry:
%v1 = call ptr @ailang_rc_alloc(i64 8)
store i64 0, ptr %v1, align 8
%v2 = call ptr @ailang_rc_alloc(i64 24)
store i64 1, ptr %v2, align 8
%v3 = getelementptr inbounds i8, ptr %v2, i64 8
store i64 12, ptr %v3, align 8
%v4 = getelementptr inbounds i8, ptr %v2, i64 16
store ptr %v1, ptr %v4, align 8
%v5 = call ptr @ailang_rc_alloc(i64 24)
store i64 1, ptr %v5, align 8
%v6 = getelementptr inbounds i8, ptr %v5, i64 8
store i64 20, ptr %v6, align 8
%v7 = getelementptr inbounds i8, ptr %v5, i64 16
store ptr %v2, ptr %v7, align 8
%v8 = call ptr @ailang_rc_alloc(i64 24)
store i64 1, ptr %v8, align 8
%v9 = getelementptr inbounds i8, ptr %v8, i64 8
store i64 10, ptr %v9, align 8
%v10 = getelementptr inbounds i8, ptr %v8, i64 16
store ptr %v5, ptr %v10, align 8
%v11 = call i64 @ail_list_sum_list(ptr %v8)
%v12 = call i8 @ail_prelude_print__Int(i64 %v11)
ret i8 %v12
}
define i8 @ail_list_main_adapter(ptr %_env) {
entry:
%r = call i8 @ail_list_main()
ret i8 %r
}
define void @drop_list_IntList(ptr %p) {
entry:
%is_null = icmp eq ptr %p, null
br i1 %is_null, label %ret, label %live
live:
%tag = load i64, ptr %p, align 8
switch i64 %tag, label %dflt [
i64 0, label %arm_0
i64 1, label %arm_1
]
arm_0:
br label %join
arm_1:
%a0 = getelementptr inbounds i8, ptr %p, i64 16
%v1 = load ptr, ptr %a0, align 8
call void @drop_list_IntList(ptr %v1)
br label %join
dflt:
unreachable
join:
call void @ailang_rc_dec(ptr %p)
br label %ret
ret:
ret void
}
define void @partial_drop_list_IntList(ptr %p, i64 %mask) {
entry:
%is_null = icmp eq ptr %p, null
br i1 %is_null, label %ret, label %live
live:
%tag = load i64, ptr %p, align 8
switch i64 %tag, label %dflt [
i64 0, label %arm_0
i64 1, label %arm_1
]
arm_0:
br label %join
arm_1:
%b0 = and i64 %mask, 2
%s1 = icmp ne i64 %b0, 0
br i1 %s1, label %after_1_1, label %do_1_1
do_1_1:
%a2 = getelementptr inbounds i8, ptr %p, i64 16
%v3 = load ptr, ptr %a2, align 8
call void @drop_list_IntList(ptr %v3)
br label %after_1_1
after_1_1:
br label %join
dflt:
unreachable
join:
call void @ailang_rc_dec(ptr %p)
br label %ret
ret:
ret void
}
define i1 @ail_prelude_float_eq(double %arg_x, double %arg_y) alwaysinline {
entry:
%v1 = fcmp oeq double %arg_x, %arg_y
ret i1 %v1
}
define i1 @ail_prelude_float_eq_adapter(ptr %_env, double %a0, double %a1) {
entry:
%r = call i1 @ail_prelude_float_eq(double %a0, double %a1)
ret i1 %r
}
define i1 @ail_prelude_float_ne(double %arg_x, double %arg_y) alwaysinline {
entry:
%v1 = fcmp une double %arg_x, %arg_y
ret i1 %v1
}
define i1 @ail_prelude_float_ne_adapter(ptr %_env, double %a0, double %a1) {
entry:
%r = call i1 @ail_prelude_float_ne(double %a0, double %a1)
ret i1 %r
}
define i1 @ail_prelude_float_lt(double %arg_x, double %arg_y) alwaysinline {
entry:
%v1 = fcmp olt double %arg_x, %arg_y
ret i1 %v1
}
define i1 @ail_prelude_float_lt_adapter(ptr %_env, double %a0, double %a1) {
entry:
%r = call i1 @ail_prelude_float_lt(double %a0, double %a1)
ret i1 %r
}
define i1 @ail_prelude_float_le(double %arg_x, double %arg_y) alwaysinline {
entry:
%v1 = fcmp ole double %arg_x, %arg_y
ret i1 %v1
}
define i1 @ail_prelude_float_le_adapter(ptr %_env, double %a0, double %a1) {
entry:
%r = call i1 @ail_prelude_float_le(double %a0, double %a1)
ret i1 %r
}
define i1 @ail_prelude_float_gt(double %arg_x, double %arg_y) alwaysinline {
entry:
%v1 = fcmp ogt double %arg_x, %arg_y
ret i1 %v1
}
define i1 @ail_prelude_float_gt_adapter(ptr %_env, double %a0, double %a1) {
entry:
%r = call i1 @ail_prelude_float_gt(double %a0, double %a1)
ret i1 %r
}
define i1 @ail_prelude_float_ge(double %arg_x, double %arg_y) alwaysinline {
entry:
%v1 = fcmp oge double %arg_x, %arg_y
ret i1 %v1
}
define i1 @ail_prelude_float_ge_adapter(ptr %_env, double %a0, double %a1) {
entry:
%r = call i1 @ail_prelude_float_ge(double %a0, double %a1)
ret i1 %r
}
define ptr @ail_prelude_show__Int(i64 %arg_x) {
entry:
%v1 = call ptr @ailang_int_to_str(i64 %arg_x)
ret ptr %v1
}
define ptr @ail_prelude_show__Int_adapter(ptr %_env, i64 %a0) {
entry:
%r = call ptr @ail_prelude_show__Int(i64 %a0)
ret ptr %r
}
define i8 @ail_prelude_print__Int(i64 %arg_x) {
entry:
%v1 = call ptr @ail_prelude_show__Int(i64 %arg_x)
%v2 = getelementptr inbounds i8, ptr %v1, i64 8
%v3 = load ptr, ptr @stdout, align 8
call i32 @fputs(ptr %v2, ptr %v3)
call void @ailang_rc_dec(ptr %v1)
ret i8 0
}
define i8 @ail_prelude_print__Int_adapter(ptr %_env, i64 %a0) {
entry:
%r = call i8 @ail_prelude_print__Int(i64 %a0)
ret i8 %r
}
define void @drop_prelude_Ordering(ptr %p) {
entry:
%is_null = icmp eq ptr %p, null
br i1 %is_null, label %ret, label %live
live:
%tag = load i64, ptr %p, align 8
switch i64 %tag, label %dflt [
i64 0, label %arm_0
i64 1, label %arm_1
i64 2, label %arm_2
]
arm_0:
br label %join
arm_1:
br label %join
arm_2:
br label %join
dflt:
unreachable
join:
call void @ailang_rc_dec(ptr %p)
br label %ret
ret:
ret void
}
define void @partial_drop_prelude_Ordering(ptr %p, i64 %mask) {
entry:
%is_null = icmp eq ptr %p, null
br i1 %is_null, label %ret, label %live
live:
%tag = load i64, ptr %p, align 8
switch i64 %tag, label %dflt [
i64 0, label %arm_0
i64 1, label %arm_1
i64 2, label %arm_2
]
arm_0:
br label %join
arm_1:
br label %join
arm_2:
br label %join
dflt:
unreachable
join:
call void @ailang_rc_dec(ptr %p)
br label %ret
ret:
ret void
}
define void @drop_raw_buf_RawBuf(ptr %p) {
entry:
%is_null = icmp eq ptr %p, null
br i1 %is_null, label %ret, label %live
live:
call void @ailang_rc_dec(ptr %p)
br label %ret
ret:
ret void
}
define void @partial_drop_raw_buf_RawBuf(ptr %p, i64 %mask) {
entry:
%is_null = icmp eq ptr %p, null
br i1 %is_null, label %ret, label %live
live:
call void @ailang_rc_dec(ptr %p)
br label %ret
ret:
ret void
}
define i32 @main() {
call i8 @ail_list_main()
ret i32 0
}
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