Brummel
aea3758742
Three drift items from ailang-architect, plus one false-positive
surfaced during verification:
1. DESIGN.md silent on closure-pair 4.14x finding (21'b).
Decision-10 ratified: "Workload scope of the 1.3x target"
paragraph scopes the retirement gate to linear/tree/poly-ADT
workloads; closure-pair carve-out documented as
representational cost (closure cell + env struct = 2 allocs
per step) until a slab/pool answer ships.
2. bench/compile_check.py corpus drift. Three fixtures added
(bench_compute_intsum, bench_compute_collatz,
bench_list_sum_explicit), re-baselined. Now 12 fixtures x
2 ops = 24 compile-time metrics.
3. baseline.json convention not codified. Note field gains
"max-of-distribution gets wider band than percentile"
convention discovered in 21'd.
4. (verification finding) bench_compute_intsum cross_lang
tolerances at 15%/12% fire on subprocess-spawn jitter for
sub-millisecond fixtures. Widened to 35% across all five
intsum metrics; convention recorded in baseline_cross_lang
note field (sub-ms fixtures need looser bands).
All three bench gates re-run sequentially after edits:
bench/check.py — 63 metrics; 63 stable
bench/compile_check.py — 24 metrics; 24 stable
bench/cross_lang.py — 25 metrics; 25 stable
Total: 112 metrics under regression coverage, all green.
288 tests passing, 3 ignored. No Rust changes.
119 lines
3.1 KiB
JSON
119 lines
3.1 KiB
JSON
{
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"version": 1,
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"captured": "2026-05-09",
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"captured_via": "bench/cross_lang.py",
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"note": "Cross-language wall-time baseline. Per-fixture: AILang at --alloc=rc, AILang at --alloc=bump, hand-C at clang -O2. Ratios rc/c and bump/c are the headline answer to CLAUDE.md's LLVM-linkable performance claim. The C reference uses malloc-and-leak to mirror AILang's implicit-mode RC; an explicit-mode + free() variant is queued. Tolerance convention: sub-millisecond fixtures (e.g. bench_compute_intsum at ~0.4 ms; LLVM-folds the loop to a single printf) have wider per-run jitter than dominant-runtime fixtures because subprocess spawn / kernel-page warmup is a larger relative share. The intsum fixture's tolerances are widened to absorb that — codified in 21'g after the false-positive at 15%/12%.",
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"fixtures": {
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"bench_list_sum": {
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"ail_rc_s": {
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"baseline": 0.138906,
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"tolerance_pct": 15
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},
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"ail_bump_s": {
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"baseline": 0.050245,
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"tolerance_pct": 15
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},
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"c_s": {
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"baseline": 0.09749,
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"tolerance_pct": 15
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},
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"rc_over_c": {
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"baseline": 1.42483,
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"tolerance_pct": 12
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},
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"bump_over_c": {
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"baseline": 0.515393,
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"tolerance_pct": 12
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}
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},
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"bench_tree_walk": {
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"ail_rc_s": {
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"baseline": 0.100173,
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"tolerance_pct": 15
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},
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"ail_bump_s": {
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"baseline": 0.038673,
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"tolerance_pct": 15
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},
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"c_s": {
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"baseline": 0.036567,
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"tolerance_pct": 15
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},
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"rc_over_c": {
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"baseline": 2.739449,
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"tolerance_pct": 12
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},
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"bump_over_c": {
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"baseline": 1.057606,
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"tolerance_pct": 12
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}
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},
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"bench_compute_intsum": {
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"ail_rc_s": {
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"baseline": 0.000362,
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"tolerance_pct": 35
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},
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"ail_bump_s": {
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"baseline": 0.000371,
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"tolerance_pct": 35
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},
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"c_s": {
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"baseline": 0.000361,
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"tolerance_pct": 35
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},
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"rc_over_c": {
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"baseline": 1.002676,
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"tolerance_pct": 35
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},
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"bump_over_c": {
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"baseline": 1.028255,
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"tolerance_pct": 35
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}
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},
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"bench_compute_collatz": {
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"ail_rc_s": {
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"baseline": 0.057994,
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"tolerance_pct": 15
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},
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"ail_bump_s": {
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"baseline": 0.057159,
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"tolerance_pct": 15
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},
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"c_s": {
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"baseline": 0.05776,
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"tolerance_pct": 15
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},
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"rc_over_c": {
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"baseline": 1.00405,
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"tolerance_pct": 12
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},
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"bump_over_c": {
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"baseline": 0.989593,
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"tolerance_pct": 12
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}
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},
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"bench_list_sum_explicit": {
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"ail_rc_s": {
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"baseline": 0.150754,
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"tolerance_pct": 15
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},
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"ail_bump_s": {
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"baseline": 0.0495,
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"tolerance_pct": 15
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},
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"c_s": {
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"baseline": 0.119204,
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"tolerance_pct": 15
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},
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"rc_over_c": {
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"baseline": 1.264667,
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"tolerance_pct": 12
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},
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"bump_over_c": {
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"baseline": 0.415253,
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"tolerance_pct": 12
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}
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}
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}
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}
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