Brummel
d5c565d48d
Tasks 1-5 GREEN. T1 baseline pins (re-point annotation + @ailang_rc_alloc heap-box byte-pin: size=8+n*8, tag@0, fields@8/16). T2 export gate widened (is_c_scalar -> two-level is_c_abi_type: single-ctor all-Int/Float record; multi-ctor/Str/List/nested still RED; gate suite 10/10; M1 adt-ret must-fail re-pointed to multi-ctor+Str Reading). T3 codegen forwarder widened (llvm_scalar record Type::Con -> ptr; M2 forwarder body byte-unchanged; 3/3 staticlib pins). T4/T5 E2E record round-trip own+borrow, global leak-freedom. Boss spec-consistency repair (M2.1-precedent class): orchestrator correctly BLOCKED Task 5 on a genuine spec defect -- the single-ctx-readback allocs==frees proof model is unsatisfiable for borrow (and only coincidentally passes for own) because M2's TLS-ctx is bound only during the synchronous forwarder call, so host-side decs land on g_rc_*, not ctx. Boss-verified globally leak-free + value-correct both modes. Spec + plan + harness amended to the stronger global model (sum all ailang_rc_stats: lines; the M2-TLS cross-attribution documented as correct behaviour). No fresh grounding-check (removes an over-strong measurement assumption). Tasks 6 (DESIGN.md frozen-layout SSOT + lockstep pointers + freeze wording + enforceability demo) and 7 (workspace-green gate) re-dispatched on the amended plan. Bench/architect milestone-close is audit-owned. iter embedding-abi-m3.1 (PARTIAL); INDEX.md line deferred to the DONE commit
83 lines
4.2 KiB
Rust
83 lines
4.2 KiB
Rust
//! Embedding-ABI M1 codegen (spec §4): `Target::StaticLib` lowering
|
|
//! emits NO `@main` trampoline, NO `MissingEntryMain`, and one
|
|
//! external `define i64 @backtest_step(...)` (the author-chosen C
|
|
//! symbol from `(export "backtest_step")`) forwarding to the
|
|
//! internal `@ail_embed_backtest_step_step` (module
|
|
//! `embed_backtest_step` == file stem, per Design-decision 6).
|
|
//! Executable-target lowering is byte-unchanged (the
|
|
//! `missing_entry_main_is_error` in-source pin still holds).
|
|
|
|
use ailang_core::Workspace;
|
|
use std::path::PathBuf;
|
|
|
|
fn load(file: &str) -> Workspace {
|
|
let path = PathBuf::from(env!("CARGO_MANIFEST_DIR"))
|
|
.parent().unwrap().parent().unwrap()
|
|
.join("examples").join(file);
|
|
ailang_surface::load_workspace(&path).unwrap()
|
|
}
|
|
|
|
#[test]
|
|
fn staticlib_emits_forwarder_no_main() {
|
|
let ws = load("embed_backtest_step.ail");
|
|
let ir = ailang_codegen::lower_workspace_staticlib_with_alloc(
|
|
&ws, ailang_codegen::AllocStrategy::Rc).unwrap();
|
|
assert!(!ir.contains("define i32 @main()"),
|
|
"staticlib IR must not emit the @main trampoline");
|
|
assert!(ir.contains("@backtest_step("),
|
|
"staticlib IR must emit the external @backtest_step entrypoint \
|
|
(the author-chosen C symbol — invariant under module rename)");
|
|
assert!(ir.contains("@ail_embed_backtest_step_step("),
|
|
"the forwarder must call the internal \
|
|
@ail_embed_backtest_step_step (module embed_backtest_step)");
|
|
|
|
// M2: forwarder takes a leading ptr %ctx and routes it through TLS
|
|
// around the UNCHANGED internal call.
|
|
assert!(ir.contains("@__ail_tls_ctx = external thread_local global ptr"),
|
|
"staticlib module must declare the external thread-local ctx slot;\nIR:\n{ir}");
|
|
assert!(ir.contains("define i64 @backtest_step(ptr %ctx, i64 %a0, i64 %a1)"),
|
|
"forwarder must take a leading ptr %ctx;\nIR:\n{ir}");
|
|
assert!(ir.contains("store ptr %ctx, ptr @__ail_tls_ctx"),
|
|
"forwarder must publish ctx into the TLS slot;\nIR:\n{ir}");
|
|
assert!(ir.contains("call i64 @ail_embed_backtest_step_step(i64 %a0, i64 %a1)"),
|
|
"internal call must stay byte-unchanged (no ctx arg);\nIR:\n{ir}");
|
|
}
|
|
|
|
/// M3: a single-ctor scalar record param/ret crosses the embedding
|
|
/// C boundary as a bare `ptr` (the frozen payload pointer — DESIGN.md
|
|
/// §"Embedding ABI" > "Frozen value layout"). The M2 forwarder body
|
|
/// is byte-unchanged: leading `ptr %ctx`, TLS save/store/restore, the
|
|
/// internal `@ail_<module>_<fn>` call carrying no ctx arg and no
|
|
/// aggregate calling convention (no `sret`/`byval` — a record is a
|
|
/// bare ptr, not an LLVM aggregate). Internal symbol is module-
|
|
/// qualified `@ail_embed_backtest_step_record_step` (module ==
|
|
/// file stem, Design-decision 6).
|
|
#[test]
|
|
fn staticlib_record_forwarder_is_ptr_passthrough() {
|
|
let ws = load("embed_backtest_step_record.ail");
|
|
let ir = ailang_codegen::lower_workspace_staticlib_with_alloc(
|
|
&ws, ailang_codegen::AllocStrategy::Rc).unwrap();
|
|
// record param + ret cross as bare ptr; ctx leading; M2 TLS shape.
|
|
assert!(ir.contains("define ptr @backtest_step(ptr %ctx, ptr %a0, double %a1)"),
|
|
"record fwd: ptr ret, leading ptr %ctx, ptr record param, double sample;\nIR:\n{ir}");
|
|
assert!(ir.contains("store ptr %ctx, ptr @__ail_tls_ctx"),
|
|
"M2 TLS store byte-unchanged;\nIR:\n{ir}");
|
|
assert!(ir.contains("call ptr @ail_embed_backtest_step_record_step(ptr %a0, double %a1)"),
|
|
"internal call byte-unchanged (no ctx arg, module-qualified);\nIR:\n{ir}");
|
|
assert!(!ir.contains("sret") && !ir.contains("byval"),
|
|
"no aggregate convention introduced — record is a bare ptr;\nIR:\n{ir}");
|
|
assert!(!ir.contains("define i32 @main()"),
|
|
"staticlib: no @main;\nIR:\n{ir}");
|
|
}
|
|
|
|
#[test]
|
|
fn executable_target_still_emits_main() {
|
|
let ws = load("embed_backtest_step.ail");
|
|
// Default executable lowering is unaffected by the new field;
|
|
// backtest has no `main`, so exe-target lowering still rejects.
|
|
let err = ailang_codegen::lower_workspace_with_alloc(
|
|
&ws, ailang_codegen::AllocStrategy::Rc).unwrap_err();
|
|
assert!(format!("{err}").contains("has no `main` def"),
|
|
"exe target must still surface MissingEntryMain; got {err}");
|
|
}
|