docs(design): C7 realization note for the Cell carrier split

Record the Scalar -> {kind, cell} representation change under C7 (cd3d1ca):
Cell as the tag-free single-value carrier, with the hot-path carrier swap
(eval -> Option<&[Scalar]> and the edges) explicitly flagged as the deferred
next step. Doc-only; no code change.

docs/design/INDEX.md

@@ -192,6 +192,22 @@ allocation; topology mutation mid-sim.
 **Why.** Maximal streaming performance (SIMD/cache) needs a tiny closed scalar
 set and SoA. The open set is composites (schemas of columns), not scalar types.
 Type-erasure at the edge is also forced by the cdylib boundary (C13).
+**Realization (`Cell` carrier split, 2026-06).** The streamed value is now split
+into a tag-free 64-bit word and its kind. `Cell` (`crates/aura-core/src/cell.rs`)
+is a type-erased `u64`: constructed per base type (`from_i64/f64/bool/ts`) and
+read only by naming the type at the call site (`i64()/f64()/bool()/ts()` —
+branch-free bit-casts). The kind is therefore resolved once at the boundary and
+the value itself carries no tag — C7's "the type lives at the column/edge, not in
+the value" made explicit on the single-value carrier (and a single 8-byte word
+vs. the 16-byte tagged enum). `Scalar` becomes `{ kind: ScalarKind, cell: Cell }`
+— the self-describing form for the *dynamic* boundaries (builder binding, serde,
+rendering) — with `debug_assert`-guarded native accessors (caller asserts the
+kind; free in release) and a hand-written **value** `PartialEq` that preserves
+the former enum's IEEE-754 semantics (`NaN != NaN`, `+0.0 == -0.0`), pinned by
+the `scalar_eq_is_value_not_bitwise` fixture. Behaviour-preserving. `Cell` is
+**not yet** the hot-path carrier — `eval -> Option<&[Scalar]>` and the edges
+still flow `Scalar`; replacing the carrier with `Cell` is a larger step that will
+get its own note (and touch C8's `eval` contract).
 
 ### C8 — The node contract
 **Guarantee.** A node has a **signature** — its `NodeSchema`: each input's scalar