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Delay node — C5 lag-N register (f64→f64) #87

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opened 2026-06-17 16:39:02 +02:00 by Brummel · 0 comments
Brummel commented 2026-06-17 16:39:02 +02:00
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Delay{lag:i64}: C5 register, node-owned ring of length lag, warm-up skip-emit (None until lag+1 samples). Output is a pure function of pre-cycle state — the half that lets a future engine close a feedback loop. First realisation of the 'delay node does not exist yet' the engine already names. Spec docs/specs/0050 §5.

Delay{lag:i64}: C5 register, node-owned ring of length lag, warm-up skip-emit (None until lag+1 samples). Output is a pure function of pre-cycle state — the half that lets a future engine close a feedback loop. First realisation of the 'delay node does not exist yet' the engine already names. Spec docs/specs/0050 §5.
Brummel added this to the Strategy node vocabulary I — temporal, logic, resample & session milestone 2026-06-17 16:39:02 +02:00
Brummel added the feature label 2026-06-17 16:39:02 +02:00
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Reference: Brummel/Aura#87
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