claude
a32dc38d18
C29 compile/unit seam, task 3 of the self-description plan: every aura-std NodeSchema literal threads its one-line doc. Four texts were corrected against the actual eval/finalize semantics rather than taken from the plan table verbatim: Delay is a lag-N register (not one-step), GatedRecorder flushes an ungated final row at finalize, Latch is a level-sensitive set/reset register (captures no input), SeriesReducer emits its single summary row at finalize (not per cycle). Gate: cargo build -p aura-std --lib clean; full std test run follows at the all-crates gate once strategy/backtest/engine thread their sites (the earlier per-crate test gate was unsatisfiable in isolation -- std's dev-deps pull crates whose sites belong to later tasks). refs #316
75 lines
2.4 KiB
Rust
75 lines
2.4 KiB
Rust
//! `Mul` — two-input f64 product (input 0 times input 1). The fundamental
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//! multiplication primitive (e.g. squaring a return for a variance estimate:
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//! `Mul(delta, delta)`). Emits `None` until both inputs have a value.
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use aura_core::{Cell, Ctx, FieldSpec, Firing, Node, NodeSchema, PortSpec, PrimitiveBuilder, ScalarKind};
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/// Two-input f64 product: input 0 times input 1. Emits `None` until both inputs
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/// have a value.
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pub struct Mul {
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out: [Cell; 1],
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}
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impl Mul {
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pub fn new() -> Self {
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Self { out: [Cell::from_f64(0.0)] }
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}
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pub fn builder() -> PrimitiveBuilder {
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PrimitiveBuilder::new(
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"Mul",
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NodeSchema {
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inputs: vec![
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PortSpec { kind: ScalarKind::F64, firing: Firing::Any, name: "lhs".into() },
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PortSpec { kind: ScalarKind::F64, firing: Firing::Any, name: "rhs".into() },
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],
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output: vec![FieldSpec { name: "value".into(), kind: ScalarKind::F64 }],
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params: vec![],
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doc: "elementwise product of two input series",
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},
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|_| Box::new(Mul::new()),
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)
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}
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}
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impl Default for Mul {
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fn default() -> Self { Self::new() }
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}
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impl Node for Mul {
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fn lookbacks(&self) -> Vec<usize> { vec![1, 1] }
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fn eval(&mut self, ctx: Ctx<'_>) -> Option<&[Cell]> {
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let a = ctx.f64_in(0);
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let b = ctx.f64_in(1);
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if a.is_empty() || b.is_empty() {
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return None;
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}
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self.out[0] = Cell::from_f64(a[0] * b[0]);
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Some(&self.out)
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}
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fn label(&self) -> String { "Mul".to_string() }
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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use aura_core::{AnyColumn, Scalar, Timestamp};
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#[test]
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fn mul_is_product_once_both_inputs_present() {
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let mut m = Mul::new();
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let mut inputs = vec![
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AnyColumn::with_capacity(ScalarKind::F64, 1),
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AnyColumn::with_capacity(ScalarKind::F64, 1),
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];
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inputs[0].push(Scalar::f64(3.0)).unwrap();
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assert_eq!(m.eval(Ctx::new(&inputs, Timestamp(0))), None); // only one leg
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inputs[1].push(Scalar::f64(4.0)).unwrap();
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assert_eq!(m.eval(Ctx::new(&inputs, Timestamp(0))), Some([Cell::from_f64(12.0)].as_slice()));
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}
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#[test]
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fn input_slots_are_named_lhs_rhs() {
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let names: Vec<String> = Mul::builder().schema().inputs.iter().map(|p| p.name.clone()).collect();
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assert_eq!(names, ["lhs", "rhs"]);
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}
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}
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