a32dc38d18
C29 compile/unit seam, task 3 of the self-description plan: every aura-std NodeSchema literal threads its one-line doc. Four texts were corrected against the actual eval/finalize semantics rather than taken from the plan table verbatim: Delay is a lag-N register (not one-step), GatedRecorder flushes an ungated final row at finalize, Latch is a level-sensitive set/reset register (captures no input), SeriesReducer emits its single summary row at finalize (not per cycle). Gate: cargo build -p aura-std --lib clean; full std test run follows at the all-crates gate once strategy/backtest/engine thread their sites (the earlier per-crate test gate was unsatisfiable in isolation -- std's dev-deps pull crates whose sites belong to later tasks). refs #316
115 lines
3.7 KiB
Rust
115 lines
3.7 KiB
Rust
//! `Sign` — a stateless `f64 -> f64` sign extractor emitting exactly `+1.0`,
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//! `-1.0`, or `0.0` by strict comparison.
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//!
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//! The `sign0()` semantics already private in
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//! [`PositionManagement`](crate::PositionManagement)
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//! (`position_management.rs`), promoted to vocabulary (#281): `> 0 -> +1.0`,
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//! `< 0 -> -1.0`, else `0.0` — so `NaN` (which compares false on both sides)
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//! and `-0.0` both fall to `0.0`. The private helper itself stays untouched;
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//! this cell is the roster-eligible twin, the generic bridge the Bool/F64
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//! conditional plane was missing.
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//!
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//! One `f64` input (`Firing::Any`), one `f64` output, no params, stateless,
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//! allocation-free on the hot path (the single-cell output buffer is sized
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//! once at construction, C7).
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use aura_core::{Cell, Ctx, FieldSpec, Firing, Node, NodeSchema, PortSpec, PrimitiveBuilder, ScalarKind};
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/// Stateless sign extractor: `+1.0` / `-1.0` / `0.0` by strict comparison
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/// (`NaN` falls to `0.0`). Emits `None` until the input is warm (C8).
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pub struct Sign {
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out: [Cell; 1],
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}
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impl Sign {
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/// Build a `Sign` node.
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pub fn new() -> Self {
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Self { out: [Cell::from_f64(0.0)] }
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}
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/// The param-generic recipe for a blueprint primitive: paramless, builds
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/// through `Sign::new`.
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pub fn builder() -> PrimitiveBuilder {
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PrimitiveBuilder::new(
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"Sign",
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NodeSchema {
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inputs: vec![PortSpec { kind: ScalarKind::F64, firing: Firing::Any, name: "value".into() }],
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output: vec![FieldSpec { name: "value".into(), kind: ScalarKind::F64 }],
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params: vec![],
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doc: "sign of the input: -1, 0 or +1",
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},
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|_| Box::new(Sign::new()),
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)
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}
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}
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impl Default for Sign {
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fn default() -> Self {
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Self::new()
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}
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}
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impl Node for Sign {
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fn lookbacks(&self) -> Vec<usize> {
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vec![1]
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}
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fn eval(&mut self, ctx: Ctx<'_>) -> Option<&[Cell]> {
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let v = ctx.f64_in(0);
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if v.is_empty() {
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return None; // warm-up gate (C8)
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}
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let x = v[0];
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// strict comparisons: NaN and -0.0 both fall to 0.0, as sign0 does
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let s = if x > 0.0 {
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1.0
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} else if x < 0.0 {
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-1.0
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} else {
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0.0
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};
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self.out[0] = Cell::from_f64(s);
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Some(&self.out)
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}
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fn label(&self) -> String {
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"Sign".to_string()
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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use aura_core::{AnyColumn, Scalar, Timestamp};
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#[test]
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fn sign_maps_the_three_regions_and_nan_to_zero() {
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// PROPERTY: out = +1.0 / -1.0 / 0.0 by strict comparison — the sign0()
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// semantics promoted to vocabulary. NaN compares false on both sides,
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// so it falls to 0.0, exactly as sign0 does; -0.0 likewise.
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let mut node = Sign::new();
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let mut inputs = vec![AnyColumn::with_capacity(ScalarKind::F64, 1)];
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let cases = [(2.5, 1.0), (-0.1, -1.0), (0.0, 0.0), (f64::NAN, 0.0), (-0.0, 0.0)];
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for (x, want) in cases {
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inputs[0].push(Scalar::f64(x)).unwrap();
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let got = node.eval(Ctx::new(&inputs, Timestamp(0)));
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assert_eq!(got, Some([Cell::from_f64(want)].as_slice()), "sign({x})");
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}
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}
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#[test]
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fn sign_is_none_until_warm() {
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// Cold input -> None (C8 warm-up gate), like every std cell.
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let mut node = Sign::new();
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let inputs = vec![AnyColumn::with_capacity(ScalarKind::F64, 1)];
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assert_eq!(node.eval(Ctx::new(&inputs, Timestamp(0))), None);
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}
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#[test]
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fn input_slot_is_named_value() {
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let names: Vec<String> =
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Sign::builder().schema().inputs.iter().map(|p| p.name.clone()).collect();
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assert_eq!(names, ["value"]);
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}
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}
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