Brummel
5170b6abd1
Closes Gitea #1. Realises the "P2 follow-up" called out in examples/prelude.ail:9 — removes the surface comparator names `==` / `!=` / `<` / `<=` / `>` / `>=` from the language entirely, routes the LLM-author's `(app eq …)` / `(app compare …)` / `(app ne|lt|le|gt|ge …)` through prelude.Eq / prelude.Ord class- dispatch, ships six named Float-comparison fns (`float_eq`/`float_ne`/`float_lt`/`float_le`/`float_gt`/`float_ge`) so Float keeps comparability without an Eq/Ord instance, and emits primitive instance bodies with `alwaysinline` so the -O0 IR shape stays at one instruction per comparison. Plan-task journal (13 tasks, single atomic iter per Approach A): Task 1 — Bootstrap: 4 new fixtures (eq_user_adt_smoke.ail, eq_float_must_fail.ail, float_compare_smoke.ail, operator_unbound_check.ail) + 5 new E2E/pin tests as RED starting state. All 5 confirmed RED at start: north-star fixed `NoInstance Eq Unit` (preserved by Unit-eq opening line intentionally added in plan-self-review); float_compare unknown `float_eq`; operator-name typechecked (== still polymorphic); must-fail diagnostic lacked `float_eq`; alwaysinline absent from IR. Task 2 — Codegen alwaysinline + intercept arms: introduced `intercept_emit_wants_alwaysinline` allowlist + appended ` alwaysinline` between `)` and `{` of the `define` line in `emit_fn`; added 9 new intercept arms to `try_emit_primitive_instance_body` — `eq__Int`/`eq__Bool`/ `eq__Unit` + the six `float_*` arms. Task 3 — Prelude reshape: `instance Eq Unit` added; Eq Int/Bool bodies become placeholder-`false` (intercept overrides); six `float_*` free fns added; line-9 P2-follow-up comment removed. Lockstep hash re-pins: prelude_module_hash_pin (3abe0d3fa3c11c99 → new), mono_hash_stability six body-hash literals (eq__Int/Bool/Str + compare__Int/Bool/Str all shifted because placeholder body changes the canonical hash). IR-snapshot regen (hello/list/max3/sum/ws_main) rolled forward into this task at orchestrator's pragmatic call — prelude shift forces the snapshots immediately. Task 4 — Fixture migration: 58 .ail fixtures rewritten (`(app == …)` → `(app eq …)`, etc.; Float-typed operand sites to `(app float_eq …)` / `(app float_lt …)`). eq_ord_user_adt.ail:21 inner `==` → `eq` migration with lockstep eq_ord_e2e.rs:134 body-hash re-pin (3c4cf040cb4e8bb2 → new). Two prose snapshots accepted; deps test + 5 hash_pin literals updated as cascading consequences. Task 5 — Test-scaffold migration: all 8 in-source `#[cfg(test)] mod tests` AST-literal sites threaded (desugar.rs:2414, check/lib.rs:5656/6092/6220, codegen/lib.rs sites). 7 obsolete in-source tests deleted (5 eq_typechecks + 2 lower_eq ADT/Fn rejection — coverage moves to E2E eq_user_adt_smoke + eq_float_must_fail). 2 additional letrec tests deleted (single-module check env can't resolve eq/ge without prelude auto-import; covered by workspace E2E). Task 6 — Lit-pattern desugar: build_eq emits `Term::Var { name: "eq" }` instead of `"=="` at desugar.rs:1109; doc-comment rewritten to describe class-dispatch. Task 7 — Dead-machinery deletion sweep (compile-gated): typchecker builtins (install + list comparator entries deleted); codegen builtin_binop_typed (10 comparator arms deleted from synth.rs, table reduced to arithmetic core); lower_eq fn entirely deleted; `==` short-circuit in lower_app deleted; `is_static_callee` `==` clause deleted; `is_arithmetic_or_comparison_op` renamed to `is_arithmetic_op` + caller-update at codegen/lib.rs:2152 + :2529. Dead `poly_a_a_to_bool` helpers also removed. Workspace build green after compile gate — every caller of the deleted surface was migrated by Tasks 4-6. Task 8 — Float-aware NoInstance diagnostic: check/lib.rs:856-880 addendum extended to name `float_eq` / `float_lt` as the explicit alternative for Eq/Ord at Float; eq_float_noinstance.rs:32-44 assertion extended. Task 9 — IR snapshot regen: subsumed by Task 3 (prelude shift forced immediate snapshot regen; deferring to Task 9 would have left the workspace red between tasks). Task 10 — Prose-projection cleanup: 6 comparator arms deleted from binop_info; 3 in-source mod-tests updated/deleted (comparator-infix rendering would be dishonest now that the operators are no longer language identifiers). Task 11 — Contract updates: 5 design files rewritten to the class-dispatch present — float-semantics.md (arithmetic guarantees retained on +/-/*/; comparison guarantees transferred from ==/!=/< to float_eq/float_ne/float_lt/etc.); prelude-classes.md (Eq Unit added to instance list; new paragraph on six float_* fns; Float-no-Eq/Ord clause gains `→ use float_eq` cross-reference); str-abi.md (clause "REMAIN primitive operators" rewritten to describe class-method dispatch); scope-boundaries.md (multiple operator-name and Pattern::Lit-desugar clauses rewritten); authoring-surface.md (==, <= dropped from operator-example list). Task 12 — Initial acceptance gate: workspace 638/0 GREEN; bench/compile_check + cross_lang 0 regressed; bench/check.py flagged 4 regressions on bench_closure_chain (+29% bump_s, +47% rc_s, +29% bump_rss_kb, +48% rc_rss_kb). Orchestrator initially classified as DONE-with-concerns; Boss reclassified as PARTIAL-via-acceptance-#8-fail after independent re-run, extended iter scope to Task 13. Task 13 — Direct icmp intercept arms (Boss-extension): try_emit_primitive_instance_body gains direct-icmp arms for lt__Int / le__Int / gt__Int / ge__Int / ne__Int, bypassing the compare__Int → Ordering → match indirection that allocated one Ordering ctor per call in tight loops. Each new arm inherits `alwaysinline` via the existing allowlist (extended accordingly). New IR pin test `ord_int_intercept_ir_pin.rs` + smoke fixture `ord_int_intercept_smoke.ail` ratify the optimization — opt -O2 -S confirms zero `call @ail_prelude_lt__Int` in optimized IR; the icmp folds directly at every use site. Bool variants (lt__Bool/etc.) deliberately NOT added — no bench/example calls Ord at Bool; spec-extension permits skipping if unreachable at bench level. Family can be extended symmetrically when first Bool-ordered perf workload appears. Bench-gate post-Task-13: bench_closure_chain bump_s -6.05%, rc_s -2.67%, bump_rss_kb -0.77%, rc_rss_kb +0.46% — all four previously-regressed metrics back inside tolerance. Full bench corpus: 36 metrics, 0 regressed, 0 improved beyond tolerance, 36 stable. bench/check.py exit 0 ✓; bench/compile_check.py exit 0 ✓; bench/cross_lang.py exit 0 ✓. Workspace: 640 passed, 0 failed across all binaries (delta vs. milestone start: +5 new E2E/pin tests added in Task 1 + 1 IR pin added in Task 13 − 9 in-source mod tests deleted as obsolete net ≈ −3). The eq_user_adt_smoke fixture's Unit-opening line was the deliberate RED-first device added in planner self-review so the north-star wouldn't accidentally GREEN at start (user-ADT-Eq on Point with hand-written instance was already operable today; the milestone's actual delivery is operator-name death + Eq Unit + Float-named-fns + cleanup of the two-pathy primitive comparator machinery). Net delta: 96 files changed, 1760 insertions, 1101 deletions; 12 net-new files (6 new fixtures, 5 new E2E/pin tests, 1 stats file). main passes-test-count: 640 (was 633 pre-iter, accounting for the deletions). Spec-vs-acceptance addendum: spec §Testing strategy anticipated the bench-gate-regression case with two recovery paths (`alwaysinline` investigation or "spec needs revisiting toward α"). Task 13 is the third path — direct intercept arms for `lt`/etc. that bypass the compare→match path entirely. The spec's contingency clause was thus generous enough to absorb Task 13 without spec revision, but a future iter that hits a class-method primitive where the body shape introduces a similar codegen cost (Ordering allocation, RC tax, deferred-init) should expect a parallel extension. The pattern is "primitive instance whose canonical body indirects through other class methods that allocate" → add a direct-emit intercept arm + alwaysinline + IR-shape pin. Concerns absorbed: - Codegen lower_app / resolve_top_level_fn gained a prelude-fallback lookup so bare monomorphic prelude fns (`float_eq` etc.) resolve from non-prelude modules without explicit `prelude.float_eq` qualifier. Mirrors the typechecker's implicit prelude import — not in plan but necessary infra for the named-fn surface to be callable. - Recon's "≈10 fixtures" estimate was 6× too low — 58 actual. Mechanical migration; no design impact. - Recon caught 4 in-source AST-literal sites the spec missed (lib.rs:5656 `>=` site + three codegen/lib.rs sites); Task 5 covered all. - Recon caught 2 contract files outside the spec's update set that directly contradicted the milestone (str-abi.md + scope-boundaries.md "REMAIN primitive operators" / "Pattern::Lit desugar to ==" clauses); Task 11 covered all 5. Stats file: `bench/orchestrator-stats/2026-05-21-iter-operator-routing-eq-ord.1.json`. closes #1
238 lines
6.3 KiB
LLVM
238 lines
6.3 KiB
LLVM
; AILang generated workspace; entry: sum
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source_filename = "sum.ail"
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target triple = "<NORMALIZED>"
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declare i32 @printf(ptr, ...)
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declare i32 @puts(ptr)
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declare ptr @ailang_rc_alloc(i64)
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declare void @ailang_rc_inc(ptr)
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declare void @ailang_rc_dec(ptr)
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declare ptr @ailang_drop_worklist_new()
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declare void @ailang_drop_worklist_push(ptr, ptr)
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declare ptr @ailang_drop_worklist_pop(ptr)
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declare void @ailang_drop_worklist_free(ptr)
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declare i32 @strcmp(ptr, ptr)
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declare zeroext i1 @ail_str_eq(ptr, ptr)
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declare i32 @ail_str_compare(ptr, ptr)
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declare ptr @ailang_int_to_str(i64)
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declare ptr @ailang_float_to_str(double)
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declare ptr @ailang_bool_to_str(i1)
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declare ptr @ailang_str_clone(ptr)
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declare ptr @ailang_str_concat(ptr, ptr)
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declare i64 @llvm.fptosi.sat.i64.f64(double)
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@ail_prelude_float_eq_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_eq_adapter, ptr null }
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@ail_prelude_float_ne_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_ne_adapter, ptr null }
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@ail_prelude_float_lt_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_lt_adapter, ptr null }
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@ail_prelude_float_le_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_le_adapter, ptr null }
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@ail_prelude_float_gt_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_gt_adapter, ptr null }
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@ail_prelude_float_ge_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_float_ge_adapter, ptr null }
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@ail_prelude_eq__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_eq__Int_adapter, ptr null }
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@ail_prelude_show__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_show__Int_adapter, ptr null }
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@ail_prelude_print__Int_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_prelude_print__Int_adapter, ptr null }
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@ail_sum_sum_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_sum_sum_adapter, ptr null }
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@ail_sum_main_clos = private unnamed_addr constant { ptr, ptr } { ptr @ail_sum_main_adapter, ptr null }
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define i1 @ail_prelude_float_eq(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp oeq double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_eq_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_eq(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_ne(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp une double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_ne_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_ne(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_lt(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp olt double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_lt_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_lt(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_le(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp ole double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_le_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_le(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_gt(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp ogt double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_gt_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_gt(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_float_ge(double %arg_x, double %arg_y) alwaysinline {
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entry:
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%v1 = fcmp oge double %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_float_ge_adapter(ptr %_env, double %a0, double %a1) {
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entry:
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%r = call i1 @ail_prelude_float_ge(double %a0, double %a1)
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ret i1 %r
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}
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define i1 @ail_prelude_eq__Int(i64 %arg_x, i64 %arg_y) alwaysinline {
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entry:
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%v1 = icmp eq i64 %arg_x, %arg_y
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ret i1 %v1
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}
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define i1 @ail_prelude_eq__Int_adapter(ptr %_env, i64 %a0, i64 %a1) {
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entry:
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%r = call i1 @ail_prelude_eq__Int(i64 %a0, i64 %a1)
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ret i1 %r
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}
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define ptr @ail_prelude_show__Int(i64 %arg_x) {
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entry:
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%v1 = call ptr @ailang_int_to_str(i64 %arg_x)
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ret ptr %v1
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}
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define ptr @ail_prelude_show__Int_adapter(ptr %_env, i64 %a0) {
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entry:
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%r = call ptr @ail_prelude_show__Int(i64 %a0)
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ret ptr %r
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}
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define i8 @ail_prelude_print__Int(i64 %arg_x) {
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entry:
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%v1 = call ptr @ail_prelude_show__Int(i64 %arg_x)
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%v2 = getelementptr inbounds i8, ptr %v1, i64 8
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call i32 @puts(ptr %v2)
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call void @ailang_rc_dec(ptr %v1)
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ret i8 0
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}
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define i8 @ail_prelude_print__Int_adapter(ptr %_env, i64 %a0) {
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entry:
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%r = call i8 @ail_prelude_print__Int(i64 %a0)
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ret i8 %r
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}
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define void @drop_prelude_Ordering(ptr %p) {
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entry:
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%is_null = icmp eq ptr %p, null
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br i1 %is_null, label %ret, label %live
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live:
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%tag = load i64, ptr %p, align 8
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switch i64 %tag, label %dflt [
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i64 0, label %arm_0
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i64 1, label %arm_1
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i64 2, label %arm_2
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]
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arm_0:
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br label %join
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arm_1:
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br label %join
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arm_2:
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br label %join
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dflt:
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unreachable
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join:
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call void @ailang_rc_dec(ptr %p)
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br label %ret
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ret:
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ret void
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}
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define void @partial_drop_prelude_Ordering(ptr %p, i64 %mask) {
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entry:
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%is_null = icmp eq ptr %p, null
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br i1 %is_null, label %ret, label %live
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live:
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%tag = load i64, ptr %p, align 8
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switch i64 %tag, label %dflt [
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i64 0, label %arm_0
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i64 1, label %arm_1
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i64 2, label %arm_2
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]
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arm_0:
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br label %join
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arm_1:
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br label %join
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arm_2:
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br label %join
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dflt:
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unreachable
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join:
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call void @ailang_rc_dec(ptr %p)
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br label %ret
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ret:
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ret void
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}
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define i64 @ail_sum_sum(i64 %arg_n) {
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entry:
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%v1 = call i1 @ail_prelude_eq__Int(i64 %arg_n, i64 0)
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br i1 %v1, label %then.2, label %else.2
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then.2:
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br label %join.2
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else.2:
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%v3 = sub i64 %arg_n, 1
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%v4 = call i64 @ail_sum_sum(i64 %v3)
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%v5 = add i64 %arg_n, %v4
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br label %join.2
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join.2:
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%v6 = phi i64 [ 0, %then.2 ], [ %v5, %else.2 ]
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ret i64 %v6
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}
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define i64 @ail_sum_sum_adapter(ptr %_env, i64 %a0) {
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entry:
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%r = call i64 @ail_sum_sum(i64 %a0)
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ret i64 %r
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}
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define i8 @ail_sum_main() {
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entry:
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%v1 = call i64 @ail_sum_sum(i64 10)
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%v2 = call i8 @ail_prelude_print__Int(i64 %v1)
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ret i8 %v2
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}
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define i8 @ail_sum_main_adapter(ptr %_env) {
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entry:
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%r = call i8 @ail_sum_main()
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ret i8 %r
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}
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define i32 @main() {
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call i8 @ail_sum_main()
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ret i32 0
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}
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