5288249b44df98e5ece5e19793a52eda3bd11eda
Four tasks for cycle 0027 (spec docs/specs/0027-name-input-ports.md): 1. Add name: String to PortSpec (drop Copy) and thread all 16 construction sites in one compile-gate task — aura-std nodes get real slot names, fixtures get fixture names, derive_signature carries Role.name; port_json untouched so the byte golden stays green and the full suite passes. 2. port_json appends the name; re-capture the model byte golden and update its two substring twins (sink_has_empty_outs witnesses a leaf PortSpec.name in the model, multi_input_composite witnesses a composite Role.name carried through). 3. Lock the per-node input-slot names (8 aura-std pins). 4. C8 realization note in the design ledger (cross-links C23). refs #50
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